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[PATCH 6/6] target/arm: Add missing space in comment
From: |
Peter Maydell |
Subject: |
[PATCH 6/6] target/arm: Add missing space in comment |
Date: |
Fri, 19 Aug 2022 12:00:52 +0100 |
Fix a missing space before a comment terminator.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu_tcg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index f63f8cdd954..b714c61d940 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -64,7 +64,7 @@ void aa32_max_features(ARMCPU *cpu)
t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* FEAT_AA32HPD */
t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* FEAT_TTCNP */
- t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* FEAT_XNX*/
+ t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* FEAT_XNX */
cpu->isar.id_mmfr4 = t;
t = cpu->isar.id_mmfr5;
--
2.25.1
- Re: [PATCH 1/6] target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8, (continued)
- [PATCH 4/6] target/arm: Implement ID_DFR1, Peter Maydell, 2022/08/19
- [PATCH 5/6] target/arm: Advertise FEAT_ETS for '-cpu max', Peter Maydell, 2022/08/19
- [PATCH 3/6] target/arm: Implement ID_MMFR5, Peter Maydell, 2022/08/19
- [PATCH 2/6] target/arm: Sort KVM reads of AArch32 ID registers into encoding order, Peter Maydell, 2022/08/19
- [PATCH 6/6] target/arm: Add missing space in comment,
Peter Maydell <=
- Re: [PATCH 0/6] target/arm: Fix v8 AArch32 RAZ ID regs; implement FEAT_ETS, Richard Henderson, 2022/08/23