[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 2/6] target/arm: Sort KVM reads of AArch32 ID registers into enco
From: |
Peter Maydell |
Subject: |
[PATCH 2/6] target/arm: Sort KVM reads of AArch32 ID registers into encoding order |
Date: |
Fri, 19 Aug 2022 12:00:48 +0100 |
The code that reads the AArch32 ID registers from KVM in
kvm_arm_get_host_cpu_features() does so almost but not quite in
encoding order. Move the read of ID_PFR2 down so it's really in
encoding order.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/kvm64.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 9b9dd46d782..84c4c85f405 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -608,8 +608,6 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
ARM64_SYS_REG(3, 0, 0, 1, 0));
err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_pfr1,
ARM64_SYS_REG(3, 0, 0, 1, 1));
- err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_pfr2,
- ARM64_SYS_REG(3, 0, 0, 3, 4));
err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_dfr0,
ARM64_SYS_REG(3, 0, 0, 1, 2));
err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_mmfr0,
@@ -643,6 +641,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
ARM64_SYS_REG(3, 0, 0, 3, 1));
err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr2,
ARM64_SYS_REG(3, 0, 0, 3, 2));
+ err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_pfr2,
+ ARM64_SYS_REG(3, 0, 0, 3, 4));
/*
* DBGDIDR is a bit complicated because the kernel doesn't
--
2.25.1
- [PATCH 0/6] target/arm: Fix v8 AArch32 RAZ ID regs; implement FEAT_ETS, Peter Maydell, 2022/08/19
- [PATCH 1/6] target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8, Peter Maydell, 2022/08/19
- [PATCH 4/6] target/arm: Implement ID_DFR1, Peter Maydell, 2022/08/19
- [PATCH 5/6] target/arm: Advertise FEAT_ETS for '-cpu max', Peter Maydell, 2022/08/19
- [PATCH 3/6] target/arm: Implement ID_MMFR5, Peter Maydell, 2022/08/19
- [PATCH 2/6] target/arm: Sort KVM reads of AArch32 ID registers into encoding order,
Peter Maydell <=
- [PATCH 6/6] target/arm: Add missing space in comment, Peter Maydell, 2022/08/19
- Re: [PATCH 0/6] target/arm: Fix v8 AArch32 RAZ ID regs; implement FEAT_ETS, Richard Henderson, 2022/08/23