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[PATCH 47/62] target/arm: Hoist check for disabled stage2 translation.
From: |
Richard Henderson |
Subject: |
[PATCH 47/62] target/arm: Hoist check for disabled stage2 translation. |
Date: |
Sun, 3 Jul 2022 13:54:04 +0530 |
If stage2 translation is disabled, E1&0 translation is
just a single stage. Use the complete single stage path
rather than breaking out of the middle of the two stage path.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/ptw.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index ed25f4b91e..84d72ac249 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -2433,9 +2433,10 @@ bool get_phys_addr_with_secure(CPUARMState *env,
target_ulong address,
if (mmu_idx != s1_mmu_idx) {
/*
* Call ourselves recursively to do the stage 1 and then stage 2
- * translations if mmu_idx is a two-stage regime.
+ * translations if mmu_idx is a two-stage regime, and stage2 enabled.
*/
- if (arm_feature(env, ARM_FEATURE_EL2)) {
+ if (arm_feature(env, ARM_FEATURE_EL2) &&
+ !regime_translation_disabled(env, ARMMMUIdx_Stage2, is_secure)) {
hwaddr ipa;
int s1_prot;
int ret;
@@ -2448,9 +2449,8 @@ bool get_phys_addr_with_secure(CPUARMState *env,
target_ulong address,
ret = get_phys_addr_with_secure(env, address, access_type,
s1_mmu_idx, is_secure, result, fi);
- /* If S1 fails or S2 is disabled, return early. */
- if (ret || regime_translation_disabled(env, ARMMMUIdx_Stage2,
- is_secure)) {
+ /* If S1 fails, return early. */
+ if (ret) {
return ret;
}
--
2.34.1
- [PATCH 37/62] target/arm: Hoist read of *is_secure in S1_ptw_translate, (continued)
- [PATCH 37/62] target/arm: Hoist read of *is_secure in S1_ptw_translate, Richard Henderson, 2022/07/03
- [PATCH 38/62] target/arm: Fix S2 disabled check in S1_ptw_translate, Richard Henderson, 2022/07/03
- [PATCH 39/62] target/arm: Remove env argument from combined_attrs_fwb, Richard Henderson, 2022/07/03
- [PATCH 40/62] target/arm: Pass HCR to attribute subroutines., Richard Henderson, 2022/07/03
- [PATCH 41/62] target/arm: Fix ATS12NSO* from S PL1, Richard Henderson, 2022/07/03
- [PATCH 42/62] target/arm: Split out get_phys_addr_disabled, Richard Henderson, 2022/07/03
- [PATCH 43/62] target/arm: Reorg get_phys_addr_disabled, Richard Henderson, 2022/07/03
- [PATCH 44/62] target/arm: Add ARMMMUIdx_Phys_{S,NS}, Richard Henderson, 2022/07/03
- [PATCH 45/62] target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx, Richard Henderson, 2022/07/03
- [PATCH 46/62] target/arm: Use softmmu tlbs for page table walking, Richard Henderson, 2022/07/03
- [PATCH 47/62] target/arm: Hoist check for disabled stage2 translation.,
Richard Henderson <=
- [PATCH 48/62] target/arm: Split out get_phys_addr_twostage, Richard Henderson, 2022/07/03
- [PATCH 49/62] target/arm: Use bool consistently for get_phys_addr subroutines, Richard Henderson, 2022/07/03
- [PATCH 50/62] target/arm: Only use ARMMMUIdx_Stage1* for two-stage translation, Richard Henderson, 2022/07/03
- [PATCH 51/62] target/arm: Add ptw_idx argument to S1_ptw_translate, Richard Henderson, 2022/07/03
- [PATCH 53/62] target/arm: Extract HA and HD in aa64_va_parameters, Richard Henderson, 2022/07/03
- [PATCH 52/62] target/arm: Add isar predicates for FEAT_HAFDBS, Richard Henderson, 2022/07/03
- [PATCH 54/62] target/arm: Split out S1TranslateResult type, Richard Henderson, 2022/07/03
- [PATCH 55/62] target/arm: Move be test for regime into S1TranslateResult, Richard Henderson, 2022/07/03
- [PATCH 56/62] target/arm: Move S1_ptw_translate outside arm_ld[lq]_ptw, Richard Henderson, 2022/07/03
- [PATCH 57/62] target/arm: Add ARMFault_UnsuppAtomicUpdate, Richard Henderson, 2022/07/03