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[PULL 07/27] aspeed/smc: Fix potential overflow
From: |
Cédric Le Goater |
Subject: |
[PULL 07/27] aspeed/smc: Fix potential overflow |
Date: |
Thu, 30 Jun 2022 13:23:51 +0200 |
Coverity warns that "ssi_transfer(s->spi, 0U) << 8 * i" might overflow
because the expression is evaluated using 32-bit arithmetic and then
used in a context expecting a uint64_t.
Fixes: Coverity CID 1487244
Message-Id: <20220628165512.1133590-1-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ssi/aspeed_smc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 68aa697164d4..faed7e0cbe17 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -488,7 +488,7 @@ static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr
addr, unsigned size)
switch (aspeed_smc_flash_mode(fl)) {
case CTRL_USERMODE:
for (i = 0; i < size; i++) {
- ret |= ssi_transfer(s->spi, 0x0) << (8 * i);
+ ret |= (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i);
}
break;
case CTRL_READMODE:
@@ -497,7 +497,7 @@ static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr
addr, unsigned size)
aspeed_smc_flash_setup(fl, addr);
for (i = 0; i < size; i++) {
- ret |= ssi_transfer(s->spi, 0x0) << (8 * i);
+ ret |= (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i);
}
aspeed_smc_flash_unselect(fl);
--
2.35.3
- [PULL 00/27] aspeed queue, Cédric Le Goater, 2022/06/30
- [PULL 02/27] hw: m25p80: add tests for write protect (WP# and SRWD bit), Cédric Le Goater, 2022/06/30
- [PULL 03/27] aspeed: Set the dram container at the SoC level, Cédric Le Goater, 2022/06/30
- [PULL 01/27] hw: m25p80: add WP# pin and SRWD bit for write protection, Cédric Le Goater, 2022/06/30
- [PULL 04/27] aspeed/scu: Add trace events for read ops, Cédric Le Goater, 2022/06/30
- [PULL 07/27] aspeed/smc: Fix potential overflow,
Cédric Le Goater <=
- [PULL 05/27] aspeed/i2c: Change trace event for NORMAL_STOP states, Cédric Le Goater, 2022/06/30
- [PULL 06/27] aspeed/hace: Accumulative mode supported, Cédric Le Goater, 2022/06/30
- [PULL 08/27] aspeed: Set CPU memory property explicitly, Cédric Le Goater, 2022/06/30
- [PULL 09/27] aspeed: Add memory property to Aspeed SoC, Cédric Le Goater, 2022/06/30
- [PULL 10/27] aspeed: Remove usage of sysbus_mmio_map, Cédric Le Goater, 2022/06/30
- [PULL 12/27] aspeed: Remove use of qemu_get_cpu, Cédric Le Goater, 2022/06/30
- [PULL 11/27] aspeed: Map unimplemented devices in SoC memory, Cédric Le Goater, 2022/06/30
- [PULL 13/27] hw/arm/aspeed: add support for the Qualcomm DC-SCM v1 board, Cédric Le Goater, 2022/06/30
- [PULL 14/27] hw/arm/aspeed: add Qualcomm Firework BMC machine, Cédric Le Goater, 2022/06/30
- [PULL 15/27] hw/i2c: pmbus: Page #255 is valid page for read requests., Cédric Le Goater, 2022/06/30