[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2 41/71] target/arm: Add infrastructure for disas_sme
From: |
Peter Maydell |
Subject: |
Re: [PATCH v2 41/71] target/arm: Add infrastructure for disas_sme |
Date: |
Fri, 10 Jun 2022 10:02:00 +0100 |
On Thu, 9 Jun 2022 at 23:58, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 6/9/22 08:35, Peter Maydell wrote:
> >> + if (!disas_sme(s, insn)) {
> >> + unallocated_encoding(s);
> >> + }
> >> + break;
> >
> > I still think we should check bit 31 here.
>
> We don't do anything similar over in a32, where we've done the full
> conversion:
>
> if (disas_a32_uncond(s, insn) ||
>
> disas_vfp_uncond(s, insn) ||
>
> disas_neon_dp(s, insn) ||
>
> disas_neon_ls(s, insn) ||
>
> disas_neon_shared(s, insn)) {
>
> return;
>
> }
The difference there is that we've basically completed the decodetree
conversion. Here we're putting one decodetree disas call inside a
legacy decode, so we should put it at the right point in the
legacy structure, I think.
> and there's nothing else within major opcode 0 to conflict.
Yet :-)
-- PMM
- Re: [PATCH v2 39/71] target/arm: Add SVL to TB flags, (continued)
- [PATCH v2 32/71] target/arm: Create ARMVQMap, Richard Henderson, 2022/06/07
- [PATCH v2 37/71] target/arm: Add cpu properties for SME, Richard Henderson, 2022/06/07
- [PATCH v2 40/71] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h, Richard Henderson, 2022/06/07
- [PATCH v2 41/71] target/arm: Add infrastructure for disas_sme, Richard Henderson, 2022/06/07
- [PATCH v2 43/71] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL, Richard Henderson, 2022/06/07
- [PATCH v2 47/71] target/arm: Export unpredicated ld/st from translate-sve.c, Richard Henderson, 2022/06/07
- [PATCH v2 44/71] target/arm: Implement SME ZERO, Richard Henderson, 2022/06/07
- [PATCH v2 45/71] target/arm: Implement SME MOVA, Richard Henderson, 2022/06/07
- [PATCH v2 46/71] target/arm: Implement SME LD1, ST1, Richard Henderson, 2022/06/07
- [PATCH v2 48/71] target/arm: Implement SME LDR, STR, Richard Henderson, 2022/06/07
- [PATCH v2 49/71] target/arm: Implement SME ADDHA, ADDVA, Richard Henderson, 2022/06/07
- [PATCH v2 42/71] target/arm: Trap AdvSIMD usage when Streaming SVE is active, Richard Henderson, 2022/06/07
- [PATCH v2 51/71] target/arm: Implement BFMOPA, BFMOPS, Richard Henderson, 2022/06/07
- [PATCH v2 53/71] target/arm: Implement SME integer outer product, Richard Henderson, 2022/06/07