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Re: [PATCH 4/5] hw/intc/arm_gicv3: Use correct number of priority bits f
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH 4/5] hw/intc/arm_gicv3: Use correct number of priority bits for the CPU |
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Date: |
Tue, 10 May 2022 10:09:24 +0100 |
On Mon, 9 May 2022 at 23:55, ishii.shuuichir@fujitsu.com
<ishii.shuuichir@fujitsu.com> wrote:
>
> Hi, Peter.
>
> > Shuuichirou, Itaru: do either of you know the right setting for the A64FX
> > for this? If
> > you can find what the hardware value of the ICC_CTLR_EL3 or ICC_CTLR_EL1
> > register is (more specifically, the PRIBits subfield) that should be enough
> > to tell
> > us.
>
> The value of the PRIbits field in the A64FX is 0x4.
> Therefore, the following values is fine.
>
> > > + cpu->gic_pribits = 5;
Great, thanks very much for confirming this.
-- PMM