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Re: [PATCH v5 20/24] target/arm: Enable FEAT_CSV2_2 for -cpu max
From: |
Peter Maydell |
Subject: |
Re: [PATCH v5 20/24] target/arm: Enable FEAT_CSV2_2 for -cpu max |
Date: |
Fri, 6 May 2022 13:12:01 +0100 |
On Thu, 5 May 2022 at 20:40, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> There is no branch prediction in TCG, therefore there is no
> need to actually include the context number into the predictor.
> Therefore all we need to do is add the state for SCXTNUM_ELx.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> v2: Update emulation.rst; clear CSV2_FRAC; use decimal; tidy access_scxtnum.
> v3: Rely on EL3-no-EL2 squashing during registration.
> v5: Set SCTLR_EL1.TSCXT at user-only startup.
> ---
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- [PATCH v5 04/24] target/arm: Adjust definition of CONTEXTIDR_EL2, (continued)
- [PATCH v5 04/24] target/arm: Adjust definition of CONTEXTIDR_EL2, Richard Henderson, 2022/05/05
- [PATCH v5 13/24] target/arm: Add minimal RAS registers, Richard Henderson, 2022/05/05
- [PATCH v5 10/24] target/arm: Use field names for manipulating EL2 and EL3 modes, Richard Henderson, 2022/05/05
- [PATCH v5 12/24] target/arm: Enable FEAT_Debugv8p4 for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 11/24] target/arm: Enable FEAT_Debugv8p2 for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 16/24] target/arm: Implement ESB instruction, Richard Henderson, 2022/05/05
- [PATCH v5 15/24] target/arm: Implement virtual SError exceptions, Richard Henderson, 2022/05/05
- [PATCH v5 17/24] target/arm: Enable FEAT_RAS for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 19/24] target/arm: Enable FEAT_CSV2 for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 20/24] target/arm: Enable FEAT_CSV2_2 for -cpu max, Richard Henderson, 2022/05/05
- Re: [PATCH v5 20/24] target/arm: Enable FEAT_CSV2_2 for -cpu max,
Peter Maydell <=
- [PATCH v5 18/24] target/arm: Enable FEAT_IESB for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 14/24] target/arm: Enable SCR and HCR bits for RAS, Richard Henderson, 2022/05/05
- [PATCH v5 23/24] target/arm: Define cortex-a76, Richard Henderson, 2022/05/05
- [PATCH v5 22/24] target/arm: Enable FEAT_DGH for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 21/24] target/arm: Enable FEAT_CSV3 for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 24/24] target/arm: Define neoverse-n1, Richard Henderson, 2022/05/05