Re: [PATCH v2 2/9] aspeed/smc: Add AST1030 support

[Jamin Lin]

The 03/31/2022 15:59, Cédric Le Goater wrote:
> Hello Jamin,
> 
> On 3/31/22 10:15, Jamin Lin wrote:
> > From: Steven Lee <steven_lee@aspeedtech.com>
> > 
> > AST1030 spi controller's address decoding unit is 1MB that is identical
> > to ast2600, but fmc address decoding unit is 512kb.
> > Introduce seg_to_reg and reg_to_seg handlers for ast1030 fmc controller.
> > In addition, add ast1030 fmc, spi1, and spi2 class init handler.
> > 
> > Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
> 
> I did a review of this patch, anyhow
> 
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
> 
> but please drop the ASPEED_SMC_FEATURE_WDT_CONTROL flag which is not
> upstream.
> 
> Thanks,
> 
> C.
> 
> 
Sorry, I lost to remove it.
Will fix
> > ---
> >   hw/ssi/aspeed_smc.c | 160 ++++++++++++++++++++++++++++++++++++++++++++
> >   1 file changed, 160 insertions(+)
> > 
> > diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> > index 48305e1574..81af783729 100644
> > --- a/hw/ssi/aspeed_smc.c
> > +++ b/hw/ssi/aspeed_smc.c
> > @@ -1696,6 +1696,163 @@ static const TypeInfo aspeed_2600_spi2_info = {
> >       .class_init = aspeed_2600_spi2_class_init,
> >   };
> >   
> > +/*
> > + * The FMC Segment Registers of the AST1030 have a 512KB unit.
> > + * Only bits [27:19] are used for decoding.
> > + */
> > +#define AST1030_SEG_ADDR_MASK 0x0ff80000
> > +
> > +static uint32_t aspeed_1030_smc_segment_to_reg(const AspeedSMCState *s,
> > +        const AspeedSegments *seg)
> > +{
> > +    uint32_t reg = 0;
> > +
> > +    /* Disabled segments have a nil register */
> > +    if (!seg->size) {
> > +        return 0;
> > +    }
> > +
> > +    reg |= (seg->addr & AST1030_SEG_ADDR_MASK) >> 16; /* start offset */
> > +    reg |= (seg->addr + seg->size - 1) & AST1030_SEG_ADDR_MASK; /* end 
> > offset */
> > +    return reg;
> > +}
> > +
> > +static void aspeed_1030_smc_reg_to_segment(const AspeedSMCState *s,
> > +        uint32_t reg, AspeedSegments *seg)
> > +{
> > +    uint32_t start_offset = (reg << 16) & AST1030_SEG_ADDR_MASK;
> > +    uint32_t end_offset = reg & AST1030_SEG_ADDR_MASK;
> > +    AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
> > +
> > +    if (reg) {
> > +        seg->addr = asc->flash_window_base + start_offset;
> > +        seg->size = end_offset + (512 * KiB) - start_offset;
> > +    } else {
> > +        seg->addr = asc->flash_window_base;
> > +        seg->size = 0;
> > +    }
> > +}
> > +
> > +static const uint32_t aspeed_1030_fmc_resets[ASPEED_SMC_R_MAX] = {
> > +    [R_CONF] = (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0 |
> > +                            CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1),
> > +};
> > +
> > +static const AspeedSegments aspeed_1030_fmc_segments[] = {
> > +    { 0x0, 128 * MiB }, /* start address is readonly */
> > +    { 128 * MiB, 128 * MiB }, /* default is disabled but needed for 
> > -kernel */
> > +    { 0x0, 0 }, /* disabled */
> > +};
> > +
> > +static void aspeed_1030_fmc_class_init(ObjectClass *klass, void *data)
> > +{
> > +    DeviceClass *dc = DEVICE_CLASS(klass);
> > +    AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass);
> > +
> > +    dc->desc               = "Aspeed 1030 FMC Controller";
> > +    asc->r_conf            = R_CONF;
> > +    asc->r_ce_ctrl         = R_CE_CTRL;
> > +    asc->r_ctrl0           = R_CTRL0;
> > +    asc->r_timings         = R_TIMINGS;
> > +    asc->nregs_timings     = 2;
> > +    asc->conf_enable_w0    = CONF_ENABLE_W0;
> > +    asc->cs_num_max        = 2;
> > +    asc->segments          = aspeed_1030_fmc_segments;
> > +    asc->segment_addr_mask = 0x0ff80ff8;
> > +    asc->resets            = aspeed_1030_fmc_resets;
> > +    asc->flash_window_base = 0x80000000;
> > +    asc->flash_window_size = 0x10000000;
> > +    asc->features          = ASPEED_SMC_FEATURE_DMA |
> > +                             ASPEED_SMC_FEATURE_WDT_CONTROL;
> > +    asc->dma_flash_mask    = 0x0FFFFFFC;
> > +    asc->dma_dram_mask     = 0x000BFFFC;
> > +    asc->nregs             = ASPEED_SMC_R_MAX;
> > +    asc->segment_to_reg    = aspeed_1030_smc_segment_to_reg;
> > +    asc->reg_to_segment    = aspeed_1030_smc_reg_to_segment;
> > +    asc->dma_ctrl          = aspeed_2600_smc_dma_ctrl;
> > +}
> > +
> > +static const TypeInfo aspeed_1030_fmc_info = {
> > +    .name =  "aspeed.fmc-ast1030",
> > +    .parent = TYPE_ASPEED_SMC,
> > +    .class_init = aspeed_1030_fmc_class_init,
> > +};
> > +
> > +static const AspeedSegments aspeed_1030_spi1_segments[] = {
> > +    { 0x0, 128 * MiB }, /* start address is readonly */
> > +    { 0x0, 0 }, /* disabled */
> > +};
> > +
> > +static void aspeed_1030_spi1_class_init(ObjectClass *klass, void *data)
> > +{
> > +    DeviceClass *dc = DEVICE_CLASS(klass);
> > +    AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass);
> > +
> > +    dc->desc               = "Aspeed 1030 SPI1 Controller";
> > +    asc->r_conf            = R_CONF;
> > +    asc->r_ce_ctrl         = R_CE_CTRL;
> > +    asc->r_ctrl0           = R_CTRL0;
> > +    asc->r_timings         = R_TIMINGS;
> > +    asc->nregs_timings     = 2;
> > +    asc->conf_enable_w0    = CONF_ENABLE_W0;
> > +    asc->cs_num_max        = 2;
> > +    asc->segments          = aspeed_1030_spi1_segments;
> > +    asc->segment_addr_mask = 0x0ff00ff0;
> > +    asc->flash_window_base = 0x90000000;
> > +    asc->flash_window_size = 0x10000000;
> > +    asc->features          = ASPEED_SMC_FEATURE_DMA |
> > +                             ASPEED_SMC_FEATURE_WDT_CONTROL;
> > +    asc->dma_flash_mask    = 0x0FFFFFFC;
> > +    asc->dma_dram_mask     = 0x000BFFFC;
> > +    asc->nregs             = ASPEED_SMC_R_MAX;
> > +    asc->segment_to_reg    = aspeed_2600_smc_segment_to_reg;
> > +    asc->reg_to_segment    = aspeed_2600_smc_reg_to_segment;
> > +    asc->dma_ctrl          = aspeed_2600_smc_dma_ctrl;
> > +}
> > +
> > +static const TypeInfo aspeed_1030_spi1_info = {
> > +    .name =  "aspeed.spi1-ast1030",
> > +    .parent = TYPE_ASPEED_SMC,
> > +    .class_init = aspeed_1030_spi1_class_init,
> > +};
> > +static const AspeedSegments aspeed_1030_spi2_segments[] = {
> > +    { 0x0, 128 * MiB }, /* start address is readonly */
> > +    { 0x0, 0 }, /* disabled */
> > +};
> > +
> > +static void aspeed_1030_spi2_class_init(ObjectClass *klass, void *data)
> > +{
> > +    DeviceClass *dc = DEVICE_CLASS(klass);
> > +    AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass);
> > +
> > +    dc->desc               = "Aspeed 1030 SPI2 Controller";
> > +    asc->r_conf            = R_CONF;
> > +    asc->r_ce_ctrl         = R_CE_CTRL;
> > +    asc->r_ctrl0           = R_CTRL0;
> > +    asc->r_timings         = R_TIMINGS;
> > +    asc->nregs_timings     = 2;
> > +    asc->conf_enable_w0    = CONF_ENABLE_W0;
> > +    asc->cs_num_max        = 2;
> > +    asc->segments          = aspeed_1030_spi2_segments;
> > +    asc->segment_addr_mask = 0x0ff00ff0;
> > +    asc->flash_window_base = 0xb0000000;
> > +    asc->flash_window_size = 0x10000000;
> > +    asc->features          = ASPEED_SMC_FEATURE_DMA |
> > +                             ASPEED_SMC_FEATURE_WDT_CONTROL;
> > +    asc->dma_flash_mask    = 0x0FFFFFFC;
> > +    asc->dma_dram_mask     = 0x000BFFFC;
> > +    asc->nregs             = ASPEED_SMC_R_MAX;
> > +    asc->segment_to_reg    = aspeed_2600_smc_segment_to_reg;
> > +    asc->reg_to_segment    = aspeed_2600_smc_reg_to_segment;
> > +    asc->dma_ctrl          = aspeed_2600_smc_dma_ctrl;
> > +}
> > +
> > +static const TypeInfo aspeed_1030_spi2_info = {
> > +    .name =  "aspeed.spi2-ast1030",
> > +    .parent = TYPE_ASPEED_SMC,
> > +    .class_init = aspeed_1030_spi2_class_init,
> > +};
> > +
> >   static void aspeed_smc_register_types(void)
> >   {
> >       type_register_static(&aspeed_smc_flash_info);
> > @@ -1709,6 +1866,9 @@ static void aspeed_smc_register_types(void)
> >       type_register_static(&aspeed_2600_fmc_info);
> >       type_register_static(&aspeed_2600_spi1_info);
> >       type_register_static(&aspeed_2600_spi2_info);
> > +    type_register_static(&aspeed_1030_fmc_info);
> > +    type_register_static(&aspeed_1030_spi1_info);
> > +    type_register_static(&aspeed_1030_spi2_info);
> >   }
> >   
> >   type_init(aspeed_smc_register_types)
>