[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 3/9] aspeed/wdt: Fix ast2500/ast2600 default reload value.
From: |
Jamin Lin |
Subject: |
[PATCH v2 3/9] aspeed/wdt: Fix ast2500/ast2600 default reload value. |
Date: |
Thu, 31 Mar 2022 16:15:39 +0800 |
From: Steven Lee <steven_lee@aspeedtech.com>
Per ast2500_2520_datasheet_v1.8 and ast2600v11.pdf, the default value of
WDT00 and WDT04 is 0x014FB180 for ast2500/ast2600.
Add default_status and default_reload_value attributes for storing
counter status and reload value as they are different from ast2400.
Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
---
hw/watchdog/wdt_aspeed.c | 10 ++++++++--
include/hw/watchdog/wdt_aspeed.h | 2 ++
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
index 6aa6f90b66..386928e9c0 100644
--- a/hw/watchdog/wdt_aspeed.c
+++ b/hw/watchdog/wdt_aspeed.c
@@ -232,8 +232,8 @@ static void aspeed_wdt_reset(DeviceState *dev)
AspeedWDTState *s = ASPEED_WDT(dev);
AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(s);
- s->regs[WDT_STATUS] = 0x3EF1480;
- s->regs[WDT_RELOAD_VALUE] = 0x03EF1480;
+ s->regs[WDT_STATUS] = awc->default_status;
+ s->regs[WDT_RELOAD_VALUE] = awc->default_reload_value;
s->regs[WDT_RESTART] = 0;
s->regs[WDT_CTRL] = awc->sanitize_ctrl(0);
s->regs[WDT_RESET_WIDTH] = 0xFF;
@@ -319,6 +319,8 @@ static void aspeed_2400_wdt_class_init(ObjectClass *klass,
void *data)
awc->reset_ctrl_reg = SCU_RESET_CONTROL1;
awc->wdt_reload = aspeed_wdt_reload;
awc->sanitize_ctrl = aspeed_2400_sanitize_ctrl;
+ awc->default_status = 0x03EF1480;
+ awc->default_reload_value = 0x03EF1480;
}
static const TypeInfo aspeed_2400_wdt_info = {
@@ -355,6 +357,8 @@ static void aspeed_2500_wdt_class_init(ObjectClass *klass,
void *data)
awc->reset_pulse = aspeed_2500_wdt_reset_pulse;
awc->wdt_reload = aspeed_wdt_reload_1mhz;
awc->sanitize_ctrl = aspeed_2500_sanitize_ctrl;
+ awc->default_status = 0x014FB180;
+ awc->default_reload_value = 0x014FB180;
}
static const TypeInfo aspeed_2500_wdt_info = {
@@ -376,6 +380,8 @@ static void aspeed_2600_wdt_class_init(ObjectClass *klass,
void *data)
awc->reset_pulse = aspeed_2500_wdt_reset_pulse;
awc->wdt_reload = aspeed_wdt_reload_1mhz;
awc->sanitize_ctrl = aspeed_2600_sanitize_ctrl;
+ awc->default_status = 0x014FB180;
+ awc->default_reload_value = 0x014FB180;
}
static const TypeInfo aspeed_2600_wdt_info = {
diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h
index f945cd6c58..0e37f39f38 100644
--- a/include/hw/watchdog/wdt_aspeed.h
+++ b/include/hw/watchdog/wdt_aspeed.h
@@ -45,6 +45,8 @@ struct AspeedWDTClass {
void (*reset_pulse)(AspeedWDTState *s, uint32_t property);
void (*wdt_reload)(AspeedWDTState *s);
uint64_t (*sanitize_ctrl)(uint64_t data);
+ uint32_t default_status;
+ uint32_t default_reload_value;
};
#endif /* WDT_ASPEED_H */
--
2.17.1
- [PATCH v2 0/9] Add support for AST1030 SoC, Jamin Lin, 2022/03/31
- [PATCH v2 1/9] aspeed/adc: Add AST1030 support, Jamin Lin, 2022/03/31
- [PATCH v2 3/9] aspeed/wdt: Fix ast2500/ast2600 default reload value.,
Jamin Lin <=
- [PATCH v2 6/9] aspeed/scu: Add AST1030 support, Jamin Lin, 2022/03/31
- [PATCH v2 2/9] aspeed/smc: Add AST1030 support, Jamin Lin, 2022/03/31
- [PATCH v2 5/9] aspeed/timer: Add AST1030 support., Jamin Lin, 2022/03/31
- [PATCH v2 7/9] aspeed/soc : Add AST1030 support, Jamin Lin, 2022/03/31
- [PATCH v2 4/9] aspeed/wdt: Add AST1030 support, Jamin Lin, 2022/03/31
- [PATCH v2 8/9] aspeed: Add an AST1030 eval board, Jamin Lin, 2022/03/31