[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 10/14] hw/intc/arm_gicv3_its: Provide read accessor for translati
From: |
Peter Maydell |
Subject: |
[PATCH 10/14] hw/intc/arm_gicv3_its: Provide read accessor for translation_ops |
Date: |
Sat, 22 Jan 2022 18:24:40 +0000 |
The MemoryRegionOps gicv3_its_translation_ops currently provides only
a .write_with_attrs function, because the only register in this
region is the write-only GITS_TRANSLATER. However, if you don't
provide a read function and the guest tries reading from this memory
region, QEMU will crash because
memory_region_read_with_attrs_accessor() calls a NULL pointer.
Add a read function which always returns 0, to cover both bogus
attempts to read GITS_TRANSLATER and also reads from the rest of the
region, which is documented to be reserved, RES0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/arm_gicv3_its.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index d9ff7b88492..b17f2631269 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -813,6 +813,18 @@ static void extract_cmdq_params(GICv3ITSState *s)
}
}
+static MemTxResult gicv3_its_translation_read(void *opaque, hwaddr offset,
+ uint64_t *data, unsigned size,
+ MemTxAttrs attrs)
+{
+ /*
+ * GITS_TRANSLATER is write-only, and all other addresses
+ * in the interrupt translation space frame are RES0.
+ */
+ *data = 0;
+ return MEMTX_OK;
+}
+
static MemTxResult gicv3_its_translation_write(void *opaque, hwaddr offset,
uint64_t data, unsigned size,
MemTxAttrs attrs)
@@ -1168,6 +1180,7 @@ static const MemoryRegionOps gicv3_its_control_ops = {
};
static const MemoryRegionOps gicv3_its_translation_ops = {
+ .read_with_attrs = gicv3_its_translation_read,
.write_with_attrs = gicv3_its_translation_write,
.valid.min_access_size = 2,
.valid.max_access_size = 4,
--
2.25.1
- Re: [PATCH 01/14] target/arm: Log CPU index in 'Taking exception' log, (continued)
- [PATCH 02/14] hw/intc/arm_gicv3_its: Add tracepoints, Peter Maydell, 2022/01/22
- [PATCH 07/14] hw/intc/arm_gicv3_its: Sort ITS command list into numeric order, Peter Maydell, 2022/01/22
- [PATCH 04/14] hw/intc/arm_gicv3_its: Don't clear GITS_CREADR when GITS_CTLR.ENABLED is set, Peter Maydell, 2022/01/22
- [PATCH 10/14] hw/intc/arm_gicv3_its: Provide read accessor for translation_ops,
Peter Maydell <=
- [PATCH 11/14] hw/intc/arm_gicv3_its: Make GITS_BASER<n> RAZ/WI for unimplemented registers, Peter Maydell, 2022/01/22
- [PATCH 12/14] hw/intc/arm_gicv3_its: Check table bounds against correct limit, Peter Maydell, 2022/01/22
- [PATCH 14/14] hw/intc/arm_gicv3_its: Implement MOVI, Peter Maydell, 2022/01/22
- [PATCH 03/14] hw/intc/arm_gicv3: Initialise dma_as in GIC, not ITS, Peter Maydell, 2022/01/22