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[PATCH 04/14] hw/intc/arm_gicv3_its: Don't clear GITS_CREADR when GITS_C
From: |
Peter Maydell |
Subject: |
[PATCH 04/14] hw/intc/arm_gicv3_its: Don't clear GITS_CREADR when GITS_CTLR.ENABLED is set |
Date: |
Sat, 22 Jan 2022 18:24:34 +0000 |
The current ITS code clears GITS_CREADR when GITS_CTLR.ENABLED is set.
This is not correct -- guest code can validly clear ENABLED and then
set it again and expect the ITS to continue processing where it left
off. Remove the erroneous assignment.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/arm_gicv3_its.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 67f12d98af3..1763ba4a671 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -853,7 +853,6 @@ static bool its_writel(GICv3ITSState *s, hwaddr offset,
s->ctlr |= R_GITS_CTLR_ENABLED_MASK;
extract_table_params(s);
extract_cmdq_params(s);
- s->creadr = 0;
process_cmdq(s);
} else {
s->ctlr &= ~R_GITS_CTLR_ENABLED_MASK;
--
2.25.1
- Re: [PATCH 05/14] hw/intc/arm_gicv3_its: Don't clear GITS_CWRITER on writes to GITS_CBASER, (continued)
- [PATCH 01/14] target/arm: Log CPU index in 'Taking exception' log, Peter Maydell, 2022/01/22
- [PATCH 02/14] hw/intc/arm_gicv3_its: Add tracepoints, Peter Maydell, 2022/01/22
- [PATCH 07/14] hw/intc/arm_gicv3_its: Sort ITS command list into numeric order, Peter Maydell, 2022/01/22
- [PATCH 04/14] hw/intc/arm_gicv3_its: Don't clear GITS_CREADR when GITS_CTLR.ENABLED is set,
Peter Maydell <=
- [PATCH 10/14] hw/intc/arm_gicv3_its: Provide read accessor for translation_ops, Peter Maydell, 2022/01/22
- [PATCH 11/14] hw/intc/arm_gicv3_its: Make GITS_BASER<n> RAZ/WI for unimplemented registers, Peter Maydell, 2022/01/22
- [PATCH 12/14] hw/intc/arm_gicv3_its: Check table bounds against correct limit, Peter Maydell, 2022/01/22
- [PATCH 14/14] hw/intc/arm_gicv3_its: Implement MOVI, Peter Maydell, 2022/01/22