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Re: [PATCH 4/5] hw/arm/aspeed: Fix AST2600_CLK_SEL3 address
From: |
Cédric Le Goater |
Subject: |
Re: [PATCH 4/5] hw/arm/aspeed: Fix AST2600_CLK_SEL3 address |
Date: |
Sat, 28 Aug 2021 10:15:51 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 8/27/21 11:04 PM, pdel@fb.com wrote:
> From: Peter Delevoryas <pdel@fb.com>
>
> This register address is not actually used anywhere, and the datasheet
> specifies that it's zero-initialized by default anyways, but the address
> is incorrect. This just corrects the address.
>
> Fixes: e09cf36321f6 ("hw: aspeed_scu: Add AST2600 support")
> Signed-off-by: Peter Delevoryas <pdel@fb.com>
This is covered by a patch already sent by Joel.
See https://github.com/legoater/qemu/commits/aspeed-6.2
Thanks,
C.
> ---
> hw/misc/aspeed_scu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
> index 40a38ebd85..c373e678f0 100644
> --- a/hw/misc/aspeed_scu.c
> +++ b/hw/misc/aspeed_scu.c
> @@ -108,7 +108,7 @@
> #define AST2600_EPLL_EXT TO_REG(0x244)
> #define AST2600_CLK_SEL TO_REG(0x300)
> #define AST2600_CLK_SEL2 TO_REG(0x304)
> -#define AST2600_CLK_SEL3 TO_REG(0x310)
> +#define AST2600_CLK_SEL3 TO_REG(0x308)
> #define AST2600_HW_STRAP1 TO_REG(0x500)
> #define AST2600_HW_STRAP1_CLR TO_REG(0x504)
> #define AST2600_HW_STRAP1_PROT TO_REG(0x508)
>
- Re: [PATCH 3/5] hw/arm/aspeed: Add fuji machine type, (continued)
[PATCH 4/5] hw/arm/aspeed: Fix AST2600_CLK_SEL3 address, pdel, 2021/08/27
- Re: [PATCH 4/5] hw/arm/aspeed: Fix AST2600_CLK_SEL3 address,
Cédric Le Goater <=
[PATCH 5/5] hw/arm/aspeed: Initialize AST2600 clock selection registers, pdel, 2021/08/27