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Re: [PATCH 3/4] target/arm: Take an exception if PC is misaligned
From: |
Peter Maydell |
Subject: |
Re: [PATCH 3/4] target/arm: Take an exception if PC is misaligned |
Date: |
Thu, 19 Aug 2021 20:46:19 +0100 |
On Thu, 19 Aug 2021 at 20:18, Peter Maydell <peter.maydell@linaro.org> wrote:
> Just noticed that section G1.16.7 says that when we report
> PC alignment faults to AArch32 they should be prefetch aborts,
> not UDEF. The fault address and fault status registers also need
> to be set (with slightly varying behaviour for when the fault
> is taken to Hyp mode).
>
> For AArch64 we should also be setting the FAR, which means
> that for consistency it's better to use EXCP_PREFETCH_ABORT
> and set exception.vaddress in the translate-a64.c code
> (you get better logging in the exception-entry code)
> even though these different EXCP_* all boil down to the
> same synchronous-exception vector.
Also, looking at kernel code while reviewing your alignment-checking
patchset, I realized that we should also catch this case of
a prefetch abort in linux-user/ and turn it into a
SIGBUS/BUS_ADRALN with the address being whatever the value
in the FAR is (for both arm and aarch64).
-- PMM
Re: [PATCH 3/4] target/arm: Take an exception if PC is misaligned, Peter Maydell, 2021/08/19
- Re: [PATCH 3/4] target/arm: Take an exception if PC is misaligned,
Peter Maydell <=
[PATCH 2/4] target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn, Richard Henderson, 2021/08/17
[PATCH 1/4] target/arm: Take an exception if PSTATE.IL is set, Richard Henderson, 2021/08/17
[PATCH 4/4] target/arm: Suppress bp for exceptions with more priority, Richard Henderson, 2021/08/17