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Re: [PATCH 3/4] target/arm: Take an exception if PC is misaligned
From: |
Peter Maydell |
Subject: |
Re: [PATCH 3/4] target/arm: Take an exception if PC is misaligned |
Date: |
Thu, 19 Aug 2021 20:18:59 +0100 |
On Wed, 18 Aug 2021 at 02:04, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> For A64, any input to an indirect branch can cause this.
>
> For A32, many indirect branch paths force the branch to be aligned,
> but BXWritePC does not. This includes the BX instruction but also
> other interworking changes to PC. Prior to v8, this case is UNDEFINED.
> With v8, this is CONSTRAINED UNDEFINED and may either raise an
> exception or force align the PC.
>
> We choose to raise an exception because we have the infrastructure,
> it makes the generated code for gen_bx simpler, and it has the
> possibility of catching more guest bugs.
> @@ -9500,7 +9504,25 @@ static void arm_tr_translate_insn(DisasContextBase
> *dcbase, CPUState *cpu)
> CPUARMState *env = cpu->env_ptr;
> unsigned int insn;
>
> - if (arm_pre_translate_insn(dc)) {
> + /* Singlestep exceptions have the highest priority. */
> + if (arm_check_ss_active(dc)) {
> + dc->base.pc_next += 4;
> + return;
> + }
> +
> + if (dc->base.pc_next & 3) {
> + /*
> + * PC alignment fault. This has priority over the instruction abort
> + * that we would receive from a translation fault via arm_ldl_code
> + * (or the execution of the kernelpage entrypoint).
> + */
> + gen_exception_insn(dc, dc->base.pc_next, EXCP_UDEF,
> + syn_pcalignment(), default_exception_el(dc));
> + dc->base.pc_next = QEMU_ALIGN_UP(dc->base.pc_next, 4);
Just noticed that section G1.16.7 says that when we report
PC alignment faults to AArch32 they should be prefetch aborts,
not UDEF. The fault address and fault status registers also need
to be set (with slightly varying behaviour for when the fault
is taken to Hyp mode).
For AArch64 we should also be setting the FAR, which means
that for consistency it's better to use EXCP_PREFETCH_ABORT
and set exception.vaddress in the translate-a64.c code
(you get better logging in the exception-entry code)
even though these different EXCP_* all boil down to the
same synchronous-exception vector.
-- PMM
Re: [PATCH 3/4] target/arm: Take an exception if PC is misaligned,
Peter Maydell <=
[PATCH 2/4] target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn, Richard Henderson, 2021/08/17
[PATCH 1/4] target/arm: Take an exception if PSTATE.IL is set, Richard Henderson, 2021/08/17
[PATCH 4/4] target/arm: Suppress bp for exceptions with more priority, Richard Henderson, 2021/08/17