qemu-arm
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] hw: arm: aspeed: Enable eth0 interface for aspeed-ast2600-ev


From: Joel Stanley
Subject: Re: [PATCH] hw: arm: aspeed: Enable eth0 interface for aspeed-ast2600-evb
Date: Mon, 9 Aug 2021 08:01:35 +0000

On Mon, 9 Aug 2021 at 07:45, Cédric Le Goater <clg@kaod.org> wrote:
>
> On 8/8/21 10:04 PM, Guenter Roeck wrote:
> > Commit 7582591ae7 ("aspeed: Support AST2600A1 silicon revision") switched
> > the silicon revision for AST2600 to revision A1. On revision A1, the first
> > Ethernet interface is operational. Enable it.
>
> Indeed.
>
> I see that commit ba56f464f0c ("ARM: dts: aspeed: ast2600evb: Add MAC0")
> reintroduced it a while ago. But my A0 doesn't support it. I am missing
> something.
>
> Joel, why this patch didn't reach the OpenBMC kernel ?

Because your a0 doesn't support it, so it would break that. That's the
only reason.

For this patch,

Reviewed-by: Joel Stanley <joel@jms.id.au>

>
> Thanks,
>
> C.
>
>
> >
> > Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> > ---
> >  hw/arm/aspeed.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> > index 9d43e26c51..ecf0c9cfac 100644
> > --- a/hw/arm/aspeed.c
> > +++ b/hw/arm/aspeed.c
> > @@ -959,7 +959,8 @@ static void 
> > aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
> >      amc->fmc_model = "w25q512jv";
> >      amc->spi_model = "mx66u51235f";
> >      amc->num_cs    = 1;
> > -    amc->macs_mask  = ASPEED_MAC1_ON | ASPEED_MAC2_ON | ASPEED_MAC3_ON;
> > +    amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON |
> > +                     ASPEED_MAC3_ON;
> >      amc->i2c_init  = ast2600_evb_i2c_init;
> >      mc->default_ram_size = 1 * GiB;
> >      mc->default_cpus = mc->min_cpus = mc->max_cpus =
> >
>



reply via email to

[Prev in Thread] Current Thread [Next in Thread]