Re: [PATCH for-6.2 41/53] target/arm: Implement MVE VMAXNMA and VMINNMA

[Richard Henderson]

On 7/29/21 1:15 AM, Peter Maydell wrote:
> Implement the MVE VMAXNMA and VMINNMA insns; these are 2-operand, but
> the destination register must be the same as one of the source
> registers.
>
> We defer the decode of the size in bit 28 to the individual insn
> patterns rather than doing it in the format, because otherwise we
> would have a single insn pattern that overlapped with two groups (eg
> VMAXNMA with the VMULH_S and VMULH_U groups). Having two insn
> patterns per insn seems clearer than a complex multilevel nesting
> of overlapping and non-overlapping groups.
>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   target/arm/helper-mve.h    |  6 ++++++
>   target/arm/mve.decode      | 11 +++++++++++
>   target/arm/mve_helper.c    | 25 +++++++++++++++++++++++++
>   target/arm/translate-mve.c |  2 ++
>   4 files changed, 44 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~