[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [SPAM] [PATCH v2 2/3] hw: aspeed_gpio: Simplify 1.8V defines
|
From: |
Cédric Le Goater |
|
Subject: |
Re: [SPAM] [PATCH v2 2/3] hw: aspeed_gpio: Simplify 1.8V defines |
|
Date: |
Mon, 19 Jul 2021 18:02:15 +0200 |
|
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 7/13/21 8:58 AM, Joel Stanley wrote:
> There's no need to define the registers relative to the 0x800 offset
> where the controller is mapped, as the device is instantiated as it's
> own model at the correct memory address.
>
> Simplify the defines and remove the offset to save future confusion.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
> ---
> hw/gpio/aspeed_gpio.c | 73 +++++++++++++++++++++----------------------
> 1 file changed, 36 insertions(+), 37 deletions(-)
>
> diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
> index b3dec4448009..dc721aec5da7 100644
> --- a/hw/gpio/aspeed_gpio.c
> +++ b/hw/gpio/aspeed_gpio.c
> @@ -169,44 +169,43 @@
>
> /* AST2600 only - 1.8V gpios */
> /*
> - * The AST2600 has same 3.6V gpios as the AST2400 (memory offsets 0x0-0x198)
> - * and additional 1.8V gpios (memory offsets 0x800-0x9D4).
> + * The AST2600 two copies of the GPIO controller: the same 3.6V gpios as the
> + * AST2400 (memory offsets 0x0-0x198) and a second controller with 1.8V gpios
> + * (memory offsets 0x800-0x9D4).
> */
> -#define GPIO_1_8V_REG_OFFSET 0x800
> -#define GPIO_1_8V_ABCD_DATA_VALUE ((0x800 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_DIRECTION ((0x804 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_INT_ENABLE ((0x808 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_INT_SENS_0 ((0x80C - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_INT_SENS_1 ((0x810 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_INT_SENS_2 ((0x814 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_INT_STATUS ((0x818 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_RESET_TOLERANT ((0x81C - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_DATA_VALUE ((0x820 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_DIRECTION ((0x824 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_INT_ENABLE ((0x828 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_INT_SENS_0 ((0x82C - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_INT_SENS_1 ((0x830 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_INT_SENS_2 ((0x834 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_INT_STATUS ((0x838 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_RESET_TOLERANT ((0x83C - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_DEBOUNCE_1 ((0x840 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_DEBOUNCE_2 ((0x844 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_DEBOUNCE_1 ((0x848 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_DEBOUNCE_2 ((0x84C - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_DEBOUNCE_TIME_1 ((0x850 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_DEBOUNCE_TIME_2 ((0x854 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_DEBOUNCE_TIME_3 ((0x858 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_COMMAND_SRC_0 ((0x860 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_COMMAND_SRC_1 ((0x864 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_COMMAND_SRC_0 ((0x868 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_COMMAND_SRC_1 ((0x86C - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_DATA_READ ((0x8C0 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_DATA_READ ((0x8C4 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_ABCD_INPUT_MASK ((0x9D0 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_E_INPUT_MASK ((0x9D4 - GPIO_1_8V_REG_OFFSET) >> 2)
> -#define GPIO_1_8V_MEM_SIZE 0x9D8
> -#define GPIO_1_8V_REG_ARRAY_SIZE ((GPIO_1_8V_MEM_SIZE - \
> - GPIO_1_8V_REG_OFFSET) >> 2)
> +#define GPIO_1_8V_ABCD_DATA_VALUE (0x000 >> 2)
> +#define GPIO_1_8V_ABCD_DIRECTION (0x004 >> 2)
> +#define GPIO_1_8V_ABCD_INT_ENABLE (0x008 >> 2)
> +#define GPIO_1_8V_ABCD_INT_SENS_0 (0x00C >> 2)
> +#define GPIO_1_8V_ABCD_INT_SENS_1 (0x010 >> 2)
> +#define GPIO_1_8V_ABCD_INT_SENS_2 (0x014 >> 2)
> +#define GPIO_1_8V_ABCD_INT_STATUS (0x018 >> 2)
> +#define GPIO_1_8V_ABCD_RESET_TOLERANT (0x01C >> 2)
> +#define GPIO_1_8V_E_DATA_VALUE (0x020 >> 2)
> +#define GPIO_1_8V_E_DIRECTION (0x024 >> 2)
> +#define GPIO_1_8V_E_INT_ENABLE (0x028 >> 2)
> +#define GPIO_1_8V_E_INT_SENS_0 (0x02C >> 2)
> +#define GPIO_1_8V_E_INT_SENS_1 (0x030 >> 2)
> +#define GPIO_1_8V_E_INT_SENS_2 (0x034 >> 2)
> +#define GPIO_1_8V_E_INT_STATUS (0x038 >> 2)
> +#define GPIO_1_8V_E_RESET_TOLERANT (0x03C >> 2)
> +#define GPIO_1_8V_ABCD_DEBOUNCE_1 (0x040 >> 2)
> +#define GPIO_1_8V_ABCD_DEBOUNCE_2 (0x044 >> 2)
> +#define GPIO_1_8V_E_DEBOUNCE_1 (0x048 >> 2)
> +#define GPIO_1_8V_E_DEBOUNCE_2 (0x04C >> 2)
> +#define GPIO_1_8V_DEBOUNCE_TIME_1 (0x050 >> 2)
> +#define GPIO_1_8V_DEBOUNCE_TIME_2 (0x054 >> 2)
> +#define GPIO_1_8V_DEBOUNCE_TIME_3 (0x058 >> 2)
> +#define GPIO_1_8V_ABCD_COMMAND_SRC_0 (0x060 >> 2)
> +#define GPIO_1_8V_ABCD_COMMAND_SRC_1 (0x064 >> 2)
> +#define GPIO_1_8V_E_COMMAND_SRC_0 (0x068 >> 2)
> +#define GPIO_1_8V_E_COMMAND_SRC_1 (0x06C >> 2)
> +#define GPIO_1_8V_ABCD_DATA_READ (0x0C0 >> 2)
> +#define GPIO_1_8V_E_DATA_READ (0x0C4 >> 2)
> +#define GPIO_1_8V_ABCD_INPUT_MASK (0x1D0 >> 2)
> +#define GPIO_1_8V_E_INPUT_MASK (0x1D4 >> 2)
> +#define GPIO_1_8V_MEM_SIZE 0x1D8
> +#define GPIO_1_8V_REG_ARRAY_SIZE (GPIO_1_8V_MEM_SIZE >> 2)
>
> static int aspeed_evaluate_irq(GPIOSets *regs, int gpio_prev_high, int gpio)
> {
>