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Re: [PATCH for-6.2 20/34] target/arm: Implement MVE integer min/max acro
From: |
Peter Maydell |
Subject: |
Re: [PATCH for-6.2 20/34] target/arm: Implement MVE integer min/max across vector |
Date: |
Mon, 19 Jul 2021 16:28:27 +0100 |
On Sat, 17 Jul 2021 at 21:46, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 7/13/21 6:37 AM, Peter Maydell wrote:
> > +/* Max and min of absolute values */
> > +static int64_t do_maxa(int64_t n, int64_t m)
> > +{
> > + if (n < 0) {
> > + n = -n;
> > + }
> > + if (m < 0) {
> > + m = -m;
> > + }
> > + return MAX(n, m);
> > +}
>
> This doesn't look quite right. The n operand is extracted unsigned, and only
> the m
> operand is subjected to ABS.
Yes, you're right (this patch does always extract ra (here n)
unsigned, so the only case where it makes a difference is
VMINAV when the input ra is negative). I noticed this wrinkle
when implementing the FP variant of this insn, but missed it here.
-- PMM
- [PATCH for-6.2 24/34] target/arm: Implement MVE VMLADAV and VMLSLDAV, (continued)
- [PATCH for-6.2 24/34] target/arm: Implement MVE VMLADAV and VMLSLDAV, Peter Maydell, 2021/07/13
- [PATCH for-6.2 23/34] target/arm: Rename MVEGenDualAccOpFn to MVEGenLongDualAccOpFn, Peter Maydell, 2021/07/13
- [PATCH for-6.2 22/34] target/arm: Implement MVE narrowing moves, Peter Maydell, 2021/07/13
- [PATCH for-6.2 25/34] target/arm: Implement MVE VMLA, Peter Maydell, 2021/07/13
- [PATCH for-6.2 20/34] target/arm: Implement MVE integer min/max across vector, Peter Maydell, 2021/07/13
- [PATCH for-6.2 21/34] target/arm: Implement MVE VABAV, Peter Maydell, 2021/07/13
- [PATCH for-6.2 34/34] target/arm: Implement MVE interleaving loads/stores, Peter Maydell, 2021/07/13
- [PATCH for-6.2 29/34] target/arm: Implement MVE VMOV to/from 2 general-purpose registers, Peter Maydell, 2021/07/13
- [PATCH for-6.2 31/34] target/arm: Implement MVE VCTP, Peter Maydell, 2021/07/13