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Re: [PATCH 04/18] target/arm: Use asimd_imm_const for A64 decode


From: Peter Maydell
Subject: Re: [PATCH 04/18] target/arm: Use asimd_imm_const for A64 decode
Date: Mon, 28 Jun 2021 17:04:27 +0100

On Mon, 28 Jun 2021 at 16:36, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 6/28/21 6:58 AM, Peter Maydell wrote:
> > The A64 AdvSIMD modified-immediate grouping uses almost the same
> > constant encoding that A32 Neon does; reuse asimd_imm_const() (to
> > which we add the AArch64-specific case for cmode 15 op 1) instead of
> > reimplementing it all.
> >
> > Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> > ---
> >   target/arm/translate.h     |  3 +-
> >   target/arm/translate-a64.c | 86 ++++----------------------------------
> >   target/arm/translate.c     | 17 +++++++-
> >   3 files changed, 24 insertions(+), 82 deletions(-)
>
> I'm a little surprised that the fp16 case didn't move as well

fp16 is distinguished by an extra bit of decode that isn't
passed to asimd_imm_const(), so it really is A64-specific.
I could have added an extra parameter, but this seemed better,
since it matches the pseudocode (which also desn't pass that
extra decode bit to AdvSIMDExpandImm(), but treats FMOV vec,imm
halfprec as a completely separate decode).

-- PMM



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