Re: [PATCH v3 01/44] target/arm: Implement MVE VLDR/VSTR (non-widening forms)

[Richard Henderson]

On 6/17/21 5:15 AM, Peter Maydell wrote:
> Implement the forms of the MVE VLDR and VSTR insns which perform
> non-widening loads of bytes, halfwords or words from memory into
> vector elements of the same width (encodings T5, T6, T7).
>
> (At the moment we know for MVE and M-profile in general that
> vfp_access_check() can never return false, but we include the
> conventional return-true-on-failure check for consistency
> with non-M-profile translation code.)
>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
> Changes v2->v3: pass MSIZE to specify memory size,
> and advance addr by that rather than by ESIZE;
> advance addr always, not only when predication passes.
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~