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From: | Alexandre IOOSS |
Subject: | Re: [PATCH 1/2] stm32f100: Add the stm32f100 SoC |
Date: | Tue, 15 Jun 2021 11:15:56 +0200 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.2 |
On 6/15/21 10:04 AM, Alistair Francis wrote:
On Tue, Jun 15, 2021 at 5:50 PM Alexandre IOOSS <erdnaxe@crans.org> wrote:On 6/15/21 9:41 AM, Alistair Francis wrote:Aren't you missing some timers, like timer[5] 0x4000_0C00? AlistairI double-checked using the reference manual and the datasheet and there is not timer[5]: - page 36 of https://www.st.com/resource/en/reference_manual/cd00246267-stm32f100xx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdfStrange, https://www.st.com/resource/en/datasheet/stm32f100rc.pdf describes Timer 5 and page 282 of the document you linked talks about timer 5 as well. Alistair- page 30 of https://www.st.com/resource/en/datasheet/stm32f100cb.pdf I believe ST is skipping numbers to guarantee that timer[n] will have a consistent address on different STM32 SoC. Thanks, -- Alexandre
From what I understand from other STM32F100xx reference manuals:I am implementing all peripherals in the STM32F100xx reference manual which match with what is actually in the STM32F100RB SoC (used in the STM32VLDISCOVERY).
STM32F100RC SoC implements more peripherals (more USART, more timers...). Adding these peripherals in stm32f100.c means that the STM32VLDISCOVERY machine would have peripherals that does not exist on the real target. Do we want to avoid that?
Should we keep stm32f100.c with the common subset of peripherals and extend it when a machine is using a variant with more peripherals?
I believe this issue is also linked with what Philippe proposed: we could abstract STM32 SoC in the same way ATMEGA is abstracted. This would make a lot of sense since the STM32 family has a lot of similarities and we don't want to bloat QEMU with N times the same code.
Thanks, -- Alexandre
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