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[PATCH v2 21/57] tcg: Make gen_dup_i32() public
From: |
Peter Maydell |
Subject: |
[PATCH v2 21/57] tcg: Make gen_dup_i32() public |
Date: |
Mon, 14 Jun 2021 16:09:31 +0100 |
The Arm MVE VDUP implementation would like to be able to emit code to
duplicate a byte or halfword value into an i32. We have code to do
this already in tcg-op-gvec.c, so all we need to do is change the
function from static to global.
For consistency, expose both the _i32 and _i64 forms.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
I picked tcg.h just because that's where dup_const (defined
next to gen_dup_i32() and gen_dup_i64()) has its prototype.
Happy to move the prototypes elsewhere.
---
include/tcg/tcg.h | 3 +++
tcg/tcg-op-gvec.c | 4 ++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 064dab383bc..018f8965f81 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -1331,6 +1331,9 @@ uint64_t dup_const(unsigned vece, uint64_t c);
: (qemu_build_not_reached_always(), 0)) \
: dup_const(VECE, C))
+/* Replicate a value of size @vece from @in to all the lanes in @out */
+void gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in);
+void gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in);
/*
* Memory helpers that will be used by TCG generated code.
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
index 498a959839f..abe9e07116d 100644
--- a/tcg/tcg-op-gvec.c
+++ b/tcg/tcg-op-gvec.c
@@ -386,7 +386,7 @@ uint64_t (dup_const)(unsigned vece, uint64_t c)
}
/* Duplicate IN into OUT as per VECE. */
-static void gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in)
+void gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in)
{
switch (vece) {
case MO_8:
@@ -404,7 +404,7 @@ static void gen_dup_i32(unsigned vece, TCGv_i32 out,
TCGv_i32 in)
}
}
-static void gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in)
+void gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in)
{
switch (vece) {
case MO_8:
--
2.20.1
- Re: [PATCH v2 12/57] target/arm: Implement widening/narrowing MVE VLDR/VSTR insns, (continued)
- [PATCH v2 16/57] bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations, Peter Maydell, 2021/06/14
- [PATCH v2 17/57] target/arm: Implement MVE VREV16, VREV32, VREV64, Peter Maydell, 2021/06/14
- [PATCH v2 15/57] target/arm: Implement MVE VCLS, Peter Maydell, 2021/06/14
- [PATCH v2 13/57] target/arm: Move expand_pred_b() data to translate.c, Peter Maydell, 2021/06/14
- [PATCH v2 19/57] target/arm: Implement MVE VABS, Peter Maydell, 2021/06/14
- [PATCH v2 20/57] target/arm: Implement MVE VNEG, Peter Maydell, 2021/06/14
- [PATCH v2 21/57] tcg: Make gen_dup_i32() public,
Peter Maydell <=
- [PATCH v2 18/57] target/arm: Implement MVE VMVN (register), Peter Maydell, 2021/06/14
- [PATCH v2 14/57] target/arm: Implement MVE VCLZ, Peter Maydell, 2021/06/14
- [PATCH v2 24/57] target/arm: Implement MVE VADD, VSUB, VMUL, Peter Maydell, 2021/06/14
- [PATCH v2 23/57] target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR, Peter Maydell, 2021/06/14
- [PATCH v2 27/57] target/arm: Implement MVE VMAX, VMIN, Peter Maydell, 2021/06/14
- [PATCH v2 22/57] target/arm: Implement MVE VDUP, Peter Maydell, 2021/06/14
- [PATCH v2 28/57] target/arm: Implement MVE VABD, Peter Maydell, 2021/06/14