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[PATCH v5 19/31] target/arm: Enforce alignment for SRS
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From: |
Richard Henderson |
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Subject: |
[PATCH v5 19/31] target/arm: Enforce alignment for SRS |
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Date: |
Mon, 19 Apr 2021 13:22:45 -0700 |
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 2cdf58daa1..4decb2610e 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5200,11 +5200,11 @@ static void gen_srs(DisasContext *s,
}
tcg_gen_addi_i32(addr, addr, offset);
tmp = load_reg(s, 14);
- gen_aa32_st32(s, tmp, addr, get_mem_index(s));
+ gen_aa32_st_i32(s, tmp, addr, get_mem_index(s), MO_UL | MO_ALIGN);
tcg_temp_free_i32(tmp);
tmp = load_cpu_field(spsr);
tcg_gen_addi_i32(addr, addr, 4);
- gen_aa32_st32(s, tmp, addr, get_mem_index(s));
+ gen_aa32_st_i32(s, tmp, addr, get_mem_index(s), MO_UL | MO_ALIGN);
tcg_temp_free_i32(tmp);
if (writeback) {
switch (amode) {
--
2.25.1
- [PATCH v5 09/31] target/arm: Move TBFLAG_ANY bits to the bottom, (continued)
- [PATCH v5 09/31] target/arm: Move TBFLAG_ANY bits to the bottom, Richard Henderson, 2021/04/19
- [PATCH v5 10/31] target/arm: Add ALIGN_MEM to TBFLAG_ANY, Richard Henderson, 2021/04/19
- [PATCH v5 12/31] target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64, Richard Henderson, 2021/04/19
- [PATCH v5 13/31] target/arm: Fix SCTLR_B test for TCGv_i64 load/store, Richard Henderson, 2021/04/19
- [PATCH v5 14/31] target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness, Richard Henderson, 2021/04/19
- [PATCH v5 11/31] target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endianness, Richard Henderson, 2021/04/19
- [PATCH v5 15/31] target/arm: Enforce word alignment for LDRD/STRD, Richard Henderson, 2021/04/19
- [PATCH v5 17/31] target/arm: Enforce alignment for LDM/STM, Richard Henderson, 2021/04/19
- [PATCH v5 16/31] target/arm: Enforce alignment for LDA/LDAH/STL/STLH, Richard Henderson, 2021/04/19
- [PATCH v5 18/31] target/arm: Enforce alignment for RFE, Richard Henderson, 2021/04/19
- [PATCH v5 19/31] target/arm: Enforce alignment for SRS,
Richard Henderson <=
- [PATCH v5 20/31] target/arm: Enforce alignment for VLDM/VSTM, Richard Henderson, 2021/04/19
- [PATCH v5 21/31] target/arm: Enforce alignment for VLDR/VSTR, Richard Henderson, 2021/04/19
- [PATCH v5 22/31] target/arm: Enforce alignment for VLDn (all lanes), Richard Henderson, 2021/04/19
- [PATCH v5 24/31] target/arm: Enforce alignment for VLDn/VSTn (single), Richard Henderson, 2021/04/19
- [PATCH v5 23/31] target/arm: Enforce alignment for VLDn/VSTn (multiple), Richard Henderson, 2021/04/19
- [PATCH v5 25/31] target/arm: Use finalize_memop for aa64 gpr load/store, Richard Henderson, 2021/04/19
- [PATCH v5 26/31] target/arm: Use finalize_memop for aa64 fpr load/store, Richard Henderson, 2021/04/19
- [PATCH v5 27/31] target/arm: Enforce alignment for aa64 load-acq/store-rel, Richard Henderson, 2021/04/19
- [PATCH v5 28/31] target/arm: Use MemOp for size + endian in aa64 vector ld/st, Richard Henderson, 2021/04/19
- [PATCH v5 29/31] target/arm: Enforce alignment for aa64 vector LDn/STn (multiple), Richard Henderson, 2021/04/19