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[PATCH v2 4/5] hw/pci-host/versatile: Add the PCI_BAR_COUNT definition
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 4/5] hw/pci-host/versatile: Add the PCI_BAR_COUNT definition |
Date: |
Mon, 12 Oct 2020 15:20:15 +0200 |
Note from Peter Maydell:
The versatile/realview PCI controller has:
* three PCI BARs which represent memory windows on the
PCI bus which bus-master PCI devices can use to
write back into the system address space
- the device SMAPn registers allow the guest to configure
the mapping from "a bus-master access to an address
on the PCI bus wherever the guest mapped BAR n"
to "a system address", and the smap[] array holds
those register values
Use self-explicit PCI_BAR_COUNT definition instead of a magic
value, and rename some misnamed variables indexing the smap[]
array from 'win' to 'bar'.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/versatile.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 61465bbbb65..f5846b803c0 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -73,6 +73,7 @@ enum {
};
#define MEMORY_WINDOW_COUNT 3
+#define PCI_BAR_COUNT 3
struct PCIVPBState {
PCIHostState parent_obj;
@@ -99,7 +100,7 @@ struct PCIVPBState {
/* Variable state: */
uint32_t imap[MEMORY_WINDOW_COUNT];
- uint32_t smap[3];
+ uint32_t smap[PCI_BAR_COUNT];
uint32_t selfid;
uint32_t flags;
uint8_t irq_mapping;
@@ -151,7 +152,7 @@ static const VMStateDescription pci_vpb_vmstate = {
.post_load = pci_vpb_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINT32_ARRAY(imap, PCIVPBState, MEMORY_WINDOW_COUNT),
- VMSTATE_UINT32_ARRAY(smap, PCIVPBState, 3),
+ VMSTATE_UINT32_ARRAY(smap, PCIVPBState, PCI_BAR_COUNT),
VMSTATE_UINT32(selfid, PCIVPBState),
VMSTATE_UINT32(flags, PCIVPBState),
VMSTATE_UINT8(irq_mapping, PCIVPBState),
@@ -203,8 +204,8 @@ static void pci_vpb_reg_write(void *opaque, hwaddr addr,
case PCI_SMAP1:
case PCI_SMAP2:
{
- int win = (addr - PCI_SMAP0) >> 2;
- s->smap[win] = val;
+ int bar = (addr - PCI_SMAP0) >> 2;
+ s->smap[bar] = val;
break;
}
default:
@@ -235,8 +236,8 @@ static uint64_t pci_vpb_reg_read(void *opaque, hwaddr addr,
case PCI_SMAP1:
case PCI_SMAP2:
{
- int win = (addr - PCI_SMAP0) >> 2;
- return s->smap[win];
+ int bar = (addr - PCI_SMAP0) >> 2;
+ return s->smap[bar];
}
default:
qemu_log_mask(LOG_GUEST_ERROR,
@@ -377,9 +378,9 @@ static void pci_vpb_reset(DeviceState *d)
for (i = 0; i < MEMORY_WINDOW_COUNT; i++) {
s->imap[i] = 0;
}
- s->smap[0] = 0;
- s->smap[1] = 0;
- s->smap[2] = 0;
+ for (i = 0; i < PCI_BAR_COUNT; i++) {
+ s->smap[i] = 0;
+ }
s->selfid = 0;
s->flags = 0;
s->irq_mapping = s->irq_mapping_prop;
--
2.26.2
- [PATCH v2 0/5] hw: Replace some magic by definitions, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v2 1/5] hw: Replace magic value by PCI_NUM_PINS definition, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v2 2/5] hw/pci-host/pam: Use ARRAY_SIZE() instead of magic value, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v2 3/5] hw/pci-host/versatile: Add the MEMORY_WINDOW_COUNT definition, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v2 4/5] hw/pci-host/versatile: Add the PCI_BAR_COUNT definition,
Philippe Mathieu-Daudé <=
- [PATCH v2 5/5] tests/qtest: Replace magic value by NANOSECONDS_PER_SECOND definition, Philippe Mathieu-Daudé, 2020/10/12
- Re: [PATCH v2 0/5] hw: Replace some magic by definitions, Richard Henderson, 2020/10/13