Re: [PATCH v8 38/45] target/arm: Complete TBI clearing for user-only for SVE

[Richard Henderson]

On 6/25/20 5:52 AM, Peter Maydell wrote:
> On Tue, 23 Jun 2020 at 20:37, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> There are a number of paths by which the TBI is still intact
>> for user-only in the SVE helpers.
>>
>> Because we currently always set TBI for user-only, we do not
>> need to pass down the actual TBI setting from above, and we
>> can remove the top byte in the inner-most primitives, so that
>> none are forgotten.  Moreover, this keeps the "dirty" pointer
>> around at the higher levels, where we need it for any MTE checking.
>>
>> Since the normal case, especially for user-only, goes through
>> RAM, this clearing merely adds two insns per page lookup, which
>> will be completely in the noise.
> 
> Can we have an assert() somewhere suitable that TBI is set?
> That way if we ever do have an SVE-capable linux-user which
> doesn't set TBI for some reason we'll get a useful reminder
> that we need to fix something.

At what level would you like such an assert?
At present we have, in arm_cpu_reset,

      /*
       * Enable TBI0 and TBI1.  While the real kernel only enables TBI0,
       * turning on both here will produce smaller code and otherwise
       * make no difference to the user-level emulation.
       */
      env->cp15.tcr_el[1].raw_tcr = (3ULL << 37);


r~