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[PATCH v8 40/45] target/arm: Set PSTATE.TCO on exception entry
From: |
Richard Henderson |
Subject: |
[PATCH v8 40/45] target/arm: Set PSTATE.TCO on exception entry |
Date: |
Tue, 23 Jun 2020 12:36:53 -0700 |
D1.10 specifies that exception handlers begin with tag checks overridden.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v2: Only set if MTE feature present.
---
target/arm/helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 23cf44fcf4..d220612a20 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9704,6 +9704,9 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
break;
}
}
+ if (cpu_isar_feature(aa64_mte, cpu)) {
+ new_mode |= PSTATE_TCO;
+ }
pstate_write(env, PSTATE_DAIF | new_mode);
env->aarch64 = 1;
--
2.25.1
- Re: [PATCH v8 35/45] target/arm: Add mte helpers for sve scalar + int ff/nf loads, (continued)
- [PATCH v8 37/45] target/arm: Add mte helpers for sve scatter/gather memory ops, Richard Henderson, 2020/06/23
- [PATCH v8 39/45] target/arm: Implement data cache set allocation tags, Richard Henderson, 2020/06/23
- [PATCH v8 40/45] target/arm: Set PSTATE.TCO on exception entry,
Richard Henderson <=
- [PATCH v8 41/45] target/arm: Always pass cacheattr to get_phys_addr, Richard Henderson, 2020/06/23
- [PATCH v8 42/45] target/arm: Cache the Tagged bit for a page in MemTxAttrs, Richard Henderson, 2020/06/23
- [PATCH v8 43/45] target/arm: Create tagged ram when MTE is enabled, Richard Henderson, 2020/06/23
- [PATCH v8 44/45] target/arm: Add allocation tag storage for system mode, Richard Henderson, 2020/06/23