Re: Role of qemu-arm

[Peter Maydell]

On Thu, 25 Jun 2020 at 07:52, vincent Dupaquis
<v.dupaquis@trusted-objects.com> wrote:
> Regading the priviledged instructions, I do not understand the question,
> we only use available core instructions (I do not remember about
> priviledged instructions in Cortex-Mx.

For Cortex-M, privileged instructions are those which are
only accessible when execution is privileged, ie when
the CPU is either (a) in Handler mode or (b) in Thread
mode with CONTROL.nPRIV=0. Examples of insns only
available to privileged code are CPS, MRS access to
some special registers, and access to most of the
memory-mapped system registers.

thanks
-- PMM