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[PATCH v2 14/17] linux-user/aarch64: Signal SEGV_MTEAERR for async tag c
From: |
Richard Henderson |
Subject: |
[PATCH v2 14/17] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error |
Date: |
Thu, 4 Jun 2020 21:17:30 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
linux-user/aarch64/target_signal.h | 1 +
linux-user/aarch64/cpu_loop.c | 34 +++++++++++++++++++++---------
target/arm/mte_helper.c | 10 +++++++++
3 files changed, 35 insertions(+), 10 deletions(-)
diff --git a/linux-user/aarch64/target_signal.h
b/linux-user/aarch64/target_signal.h
index 777fb667fe..18013e1b23 100644
--- a/linux-user/aarch64/target_signal.h
+++ b/linux-user/aarch64/target_signal.h
@@ -21,6 +21,7 @@ typedef struct target_sigaltstack {
#include "../generic/signal.h"
+#define TARGET_SEGV_MTEAERR 8 /* Asynchronous ARM MTE error */
#define TARGET_SEGV_MTESERR 9 /* Synchronous ARM MTE exception */
#define TARGET_ARCH_HAS_SETUP_FRAME
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index 41a68a57bc..1b2f2b4239 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -71,6 +71,21 @@
put_user_u16(__x, (gaddr)); \
})
+static bool check_mte_async_fault(CPUARMState *env, target_siginfo_t *info)
+{
+ if (likely(env->cp15.tfsr_el[0] == 0)) {
+ return false;
+ }
+
+ env->cp15.tfsr_el[0] = 0;
+ info->si_signo = TARGET_SIGSEGV;
+ info->si_errno = 0;
+ info->_sifields._sigfault._addr = 0;
+ info->si_code = TARGET_SEGV_MTEAERR;
+ queue_signal(env, info->si_signo, QEMU_SI_FAULT, info);
+ return true;
+}
+
/* AArch64 main loop */
void cpu_loop(CPUARMState *env)
{
@@ -87,15 +102,13 @@ void cpu_loop(CPUARMState *env)
switch (trapnr) {
case EXCP_SWI:
- ret = do_syscall(env,
- env->xregs[8],
- env->xregs[0],
- env->xregs[1],
- env->xregs[2],
- env->xregs[3],
- env->xregs[4],
- env->xregs[5],
- 0, 0);
+ if (check_mte_async_fault(env, &info)) {
+ ret = -TARGET_ERESTARTSYS;
+ } else {
+ ret = do_syscall(env, env->xregs[8], env->xregs[0],
+ env->xregs[1], env->xregs[2], env->xregs[3],
+ env->xregs[4], env->xregs[5], 0, 0);
+ }
if (ret == -TARGET_ERESTARTSYS) {
env->pc -= 4;
} else if (ret != -TARGET_QEMU_ESIGRETURN) {
@@ -103,7 +116,8 @@ void cpu_loop(CPUARMState *env)
}
break;
case EXCP_INTERRUPT:
- /* just indicate that signals should be handled asap */
+ /* Just indicate that signals should be handled asap. */
+ check_mte_async_fault(env, &info);
break;
case EXCP_UDEF:
info.si_signo = TARGET_SIGILL;
diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c
index b15fa665df..835b6d1ded 100644
--- a/target/arm/mte_helper.c
+++ b/target/arm/mte_helper.c
@@ -542,6 +542,16 @@ static void mte_check_fail(CPUARMState *env, int mmu_idx,
select = 0;
}
env->cp15.tfsr_el[el] |= 1 << select;
+#ifdef CONFIG_USER_ONLY
+ /*
+ * Stand in for a timer irq, setting _TIF_MTE_ASYNC_FAULT,
+ * which then sends a SIGSEGV when the thread is next scheduled.
+ * This cpu will return to the main loop at the end of the TB,
+ * which is rather sooner than "normal". But the alternative
+ * is waiting until the next syscall.
+ */
+ qemu_cpu_kick(env_cpu(env));
+#endif
break;
default:
--
2.25.1
- [PATCH v2 09/17] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE, (continued)
- [PATCH v2 09/17] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE, Richard Henderson, 2020/06/05
- [PATCH v2 07/17] linux-user: Fix guest_addr_valid vs reserved_va, Richard Henderson, 2020/06/05
- [PATCH v2 10/17] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG, Richard Henderson, 2020/06/05
- [PATCH v2 11/17] linux-user/aarch64: Implement PROT_MTE, Richard Henderson, 2020/06/05
- [PATCH v2 12/17] linux-user/aarch64: Pass syndrome to EXC_*_ABORT, Richard Henderson, 2020/06/05
- [PATCH v2 14/17] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error,
Richard Henderson <=
- [PATCH v2 13/17] linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault, Richard Henderson, 2020/06/05
- [PATCH v2 16/17] target/arm: Enable MTE for user-only, Richard Henderson, 2020/06/05
- [PATCH v2 15/17] target/arm: Add allocation tag storage for user mode, Richard Henderson, 2020/06/05
- [PATCH v2 17/17] tests/tcg/aarch64: Add mte smoke tests, Richard Henderson, 2020/06/05
- Re: [PATCH v2 00/17] target-arm: Implement ARMv8.5-MemTag, user mode, Peter Maydell, 2020/06/25