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Re: [PATCH v2 08/13] hw/arm/bcm2836: Introduce BCM283XClass::core_count
From: |
Luc Michel |
Subject: |
Re: [PATCH v2 08/13] hw/arm/bcm2836: Introduce BCM283XClass::core_count |
Date: |
Tue, 18 Feb 2020 10:00:18 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 |
On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> The BCM2835 has only one core. Introduce the core_count field to
> be able to use values different than BCM283X_NCPUS (4).
>
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
> ---
> hw/arm/bcm2836.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 683d04d6ea..3b95ad11e9 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -21,6 +21,7 @@ typedef struct BCM283XClass {
> DeviceClass parent_class;
> /*< public >*/
> const char *cpu_type;
> + int core_count;
> hwaddr peri_base; /* Peripheral base address seen by the CPU */
> hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
> int clusterid;
> @@ -37,7 +38,7 @@ static void bcm2836_init(Object *obj)
> BCM283XClass *bc = BCM283X_GET_CLASS(obj);
> int n;
>
> - for (n = 0; n < BCM283X_NCPUS; n++) {
> + for (n = 0; n < bc->core_count; n++) {
> object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
> sizeof(s->cpu[n].core), bc->cpu_type,
> &error_abort, NULL);
> @@ -107,7 +108,7 @@ static void bcm2836_realize(DeviceState *dev, Error
> **errp)
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
> qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
>
> - for (n = 0; n < BCM283X_NCPUS; n++) {
> + for (n = 0; n < bc->core_count; n++) {
> /* TODO: this should be converted to a property of ARM_CPU */
> s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
>
> @@ -173,6 +174,7 @@ static void bcm2836_class_init(ObjectClass *oc, void
> *data)
> BCM283XClass *bc = BCM283X_CLASS(oc);
>
> bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
> + bc->core_count = BCM283X_NCPUS;
> bc->peri_base = 0x3f000000;
> bc->ctrl_base = 0x40000000;
> bc->clusterid = 0xf;
> @@ -187,6 +189,7 @@ static void bcm2837_class_init(ObjectClass *oc, void
> *data)
> BCM283XClass *bc = BCM283X_CLASS(oc);
>
> bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> + bc->core_count = BCM283X_NCPUS;
> bc->peri_base = 0x3f000000;
> bc->ctrl_base = 0x40000000;
> bc->clusterid = 0x0;
>
- Re: [PATCH v2 02/13] hw/arm/raspi: Avoid using TypeInfo::class_data pointer, (continued)
- [PATCH v2 03/13] hw/arm/raspi: Use more specific machine names, Philippe Mathieu-Daudé, 2020/02/17
- [PATCH v2 04/13] hw/arm/raspi: Introduce RaspiProcessorId enum, Philippe Mathieu-Daudé, 2020/02/17
- [PATCH v2 05/13] hw/arm/raspi: Remove use of the 'version' value in the board code, Philippe Mathieu-Daudé, 2020/02/17
- [PATCH v2 06/13] hw/arm/bcm2836: Restrict BCM283XClass declaration to C source, Philippe Mathieu-Daudé, 2020/02/17
- [PATCH v2 08/13] hw/arm/bcm2836: Introduce BCM283XClass::core_count, Philippe Mathieu-Daudé, 2020/02/17
- Re: [PATCH v2 08/13] hw/arm/bcm2836: Introduce BCM283XClass::core_count,
Luc Michel <=
- [PATCH v2 09/13] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs, Philippe Mathieu-Daudé, 2020/02/17
- [PATCH v2 07/13] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type, Philippe Mathieu-Daudé, 2020/02/17
- [PATCH v2 10/13] hw/arm/bcm2836: Split out common realize() code, Philippe Mathieu-Daudé, 2020/02/17
- [PATCH v2 11/13] hw/arm/bcm2836: Introduce the BCM2835 SoC, Philippe Mathieu-Daudé, 2020/02/17