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Re: [PATCH 07/13] target/arm: Define an aa32_pmu_8_1 isar feature test f
From: |
Richard Henderson |
Subject: |
Re: [PATCH 07/13] target/arm: Define an aa32_pmu_8_1 isar feature test function |
Date: |
Tue, 11 Feb 2020 10:38:37 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 2/11/20 9:37 AM, Peter Maydell wrote:
> Instead of open-coding a check on the ID_DFR0 PerfMon ID register
> field, create a standardly-named isar_feature for "does AArch32 have
> a v8.1 PMUv3" and use it.
>
> This entails moving the id_dfr0 field into the ARMISARegisters struct.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target/arm/cpu.h | 9 ++++++++-
> hw/intc/armv7m_nvic.c | 2 +-
> target/arm/cpu.c | 28 ++++++++++++++--------------
> target/arm/cpu64.c | 6 +++---
> target/arm/helper.c | 5 ++---
> 5 files changed, 28 insertions(+), 22 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [PATCH 01/13] target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registers, (continued)
- [PATCH 11/13] target/arm: Provide ARMv8.4-PMU in '-cpu max', Peter Maydell, 2020/02/11
- [PATCH 08/13] target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks, Peter Maydell, 2020/02/11
- [PATCH 04/13] target/arm: Factor out PMU register definitions, Peter Maydell, 2020/02/11
- [PATCH 07/13] target/arm: Define an aa32_pmu_8_1 isar feature test function, Peter Maydell, 2020/02/11
- Re: [PATCH 07/13] target/arm: Define an aa32_pmu_8_1 isar feature test function,
Richard Henderson <=
- [PATCH 13/13] target/arm: Correct handling of PMCR_EL0.LC bit, Peter Maydell, 2020/02/11
- [PATCH 12/13] target/arm: Correct definition of PMCRDP, Peter Maydell, 2020/02/11
- [PATCH 10/13] target/arm: Implement ARMv8.4-PMU extension, Peter Maydell, 2020/02/11