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Re: [Qemu-arm] [PATCH 0/4] hw/intc/arm_gicv3: Four simple bugfixes


From: Peter Maydell
Subject: Re: [Qemu-arm] [PATCH 0/4] hw/intc/arm_gicv3: Four simple bugfixes
Date: Thu, 23 May 2019 15:27:25 +0100

On Mon, 20 May 2019 at 17:28, Peter Maydell <address@hidden> wrote:
>
> This patchset fixes four bugs in our implementation of the GICv3.
> They're all fairly small fixes, largely typo/cut-n-paste errors...
>
> thanks
> -- PMM
>
> Peter Maydell (4):
>   hw/intc/arm_gicv3: Fix decoding of ID register range
>   hw/intc/arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1
>   hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0,VBPR1}
>   hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3

I put patches 3 and 4 into the arm pullreq; will respin
with a fixed patch 1 plus this patch 2.

thanks
-- PMM



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