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[Qemu-arm] [PATCH 0/4] hw/intc/arm_gicv3: Four simple bugfixes


From: Peter Maydell
Subject: [Qemu-arm] [PATCH 0/4] hw/intc/arm_gicv3: Four simple bugfixes
Date: Mon, 20 May 2019 17:28:05 +0100

This patchset fixes four bugs in our implementation of the GICv3.
They're all fairly small fixes, largely typo/cut-n-paste errors...

thanks
-- PMM

Peter Maydell (4):
  hw/intc/arm_gicv3: Fix decoding of ID register range
  hw/intc/arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1
  hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0,VBPR1}
  hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3

 hw/intc/arm_gicv3_cpuif.c  |  6 +++---
 hw/intc/arm_gicv3_dist.c   | 10 ++++++++--
 hw/intc/arm_gicv3_redist.c |  2 +-
 3 files changed, 12 insertions(+), 6 deletions(-)

-- 
2.20.1




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