Re: [Qemu-arm] [PATCH v5 22/24] target/arm: Implement ARMv8.5-RNG

[Richard Henderson]

On 5/10/19 9:01 AM, Peter Maydell wrote:
> On Fri, 10 May 2019 at 02:25, Richard Henderson
> <address@hidden> wrote:
>>
>> Cc: address@hidden
>> Cc: Peter Maydell <address@hidden>
>> Signed-off-by: Richard Henderson <address@hidden>
>> ---
>> v3: Log errors with -d unimp, for lack of a better flag.
>> ---
>>  target/arm/cpu.h    |  5 +++++
>>  target/arm/cpu64.c  |  1 +
>>  target/arm/helper.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
>>  3 files changed, 50 insertions(+)
> 
>> +/* We do not support re-seeding, so the two registers operate the same.  */
>> +static const ARMCPRegInfo rndr_reginfo[] = {
>> +    { .name = "RNDR", .state = ARM_CP_STATE_AA64,
>> +      .type = ARM_CP_NO_RAW | ARM_CP_SUPPRESS_TB_END,
>> +      .opc0 = 3, .opc1 = 3, .crn = 2, .crm = 4, .opc2 = 0,
>> +      .access = PL0_R, .readfn = rndr_readfn },
>> +    { .name = "RNDRRS", .state = ARM_CP_STATE_AA64,
>> +      .type = ARM_CP_NO_RAW | ARM_CP_SUPPRESS_TB_END,
>> +      .opc0 = 3, .opc1 = 3, .crn = 2, .crm = 4, .opc2 = 1,
>> +      .access = PL0_R, .readfn = rndr_readfn },
> 
> Don't these need to be marked ARM_CP_IO for the benefit
> of -icount ?

I don't think so.  There's no lock taken, as for mmio devices.  It's not not
related to time, virtual or otherwise.  There are no possible exceptions.  I
can't think of anything that would make icount care.

Have I missed something?


r~