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[Qemu-arm] [PATCH v3 1/7] target/arm64: properly handle DBGVR RESS bits
From: |
Alex Bennée |
Subject: |
[Qemu-arm] [PATCH v3 1/7] target/arm64: properly handle DBGVR RESS bits |
Date: |
Fri, 9 Nov 2018 15:21:13 +0000 |
This only fails with some (broken) versions of gdb but we should
treat the top bits of DBGBVR as RESS. Properly sign extend QEMU's
reference copy of dbgbvr and also update the register descriptions in
the comment.
Signed-off-by: Alex Bennée <address@hidden>
---
v2
- sanitise register on insertion
- update reference description
v3
- fix bogus sextract64
---
target/arm/kvm64.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 5de8ff0ac5..6351a54b28 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -103,7 +103,7 @@ static void kvm_arm_init_debug(CPUState *cs)
* capable of fancier matching but that will require exposing that
* fanciness to GDB's interface
*
- * D7.3.2 DBGBCR<n>_EL1, Debug Breakpoint Control Registers
+ * DBGBCR<n>_EL1, Debug Breakpoint Control Registers
*
* 31 24 23 20 19 16 15 14 13 12 9 8 5 4 3 2 1 0
* +------+------+-------+-----+----+------+-----+------+-----+---+
@@ -115,12 +115,25 @@ static void kvm_arm_init_debug(CPUState *cs)
* SSC/HMC/PMC: Security, Higher and Priv access control (Table D-12)
* BAS: Byte Address Select (RES1 for AArch64)
* E: Enable bit
+ *
+ * DBGBVR<n>_EL1, Debug Breakpoint Value Registers
+ *
+ * 63 53 52 49 48 2 1 0
+ * +------+-----------+----------+-----+
+ * | RESS | VA[52:49] | VA[48:2] | 0 0 |
+ * +------+-----------+----------+-----+
+ *
+ * Depending on the addressing mode bits the top bits of the register
+ * are a sign extension of the highest applicable VA bit. Some
+ * versions of GDB don't do it correctly so we ensure they are correct
+ * here so future PC comparisons will work properly.
*/
+
static int insert_hw_breakpoint(target_ulong addr)
{
HWBreakpoint brk = {
.bcr = 0x1, /* BCR E=1, enable */
- .bvr = addr
+ .bvr = sextract64(addr, 0, 53)
};
if (cur_hw_bps >= max_hw_bps) {
--
2.17.1
- [Qemu-arm] [PATCH v3 0/7] KVM Guest Debug fixes (plus TCG EL2 debug tweaks), Alex Bennée, 2018/11/09
- [Qemu-arm] [PATCH v3 7/7] arm: fix aa64_generate_debug_exceptions to work with EL2, Alex Bennée, 2018/11/09
- [Qemu-arm] [PATCH v3 2/7] target/arm64: hold BQL when calling do_interrupt(), Alex Bennée, 2018/11/09
- [Qemu-arm] [PATCH v3 1/7] target/arm64: properly handle DBGVR RESS bits,
Alex Bennée <=
- [Qemu-arm] [PATCH v3 6/7] arm: use symbolic MDCR_TDE in arm_debug_target_el, Alex Bennée, 2018/11/09
- [Qemu-arm] [PATCH v3 3/7] target/arm64: kvm debug set target_el when passing exception to guest, Alex Bennée, 2018/11/09
- [Qemu-arm] [PATCH v3 5/7] tests/guest-debug: don't use symbol resolution for PC checks, Alex Bennée, 2018/11/09
- [Qemu-arm] [PATCH v3 4/7] tests/guest-debug: fix scoping of failcount, Alex Bennée, 2018/11/09
- Re: [Qemu-arm] [PATCH v3 0/7] KVM Guest Debug fixes (plus TCG EL2 debug tweaks), Alex Bennée, 2018/11/09
- Re: [Qemu-arm] [PATCH v3 0/7] KVM Guest Debug fixes (plus TCG EL2 debug tweaks), Peter Maydell, 2018/11/12