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Re: [Qemu-arm] [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GIC
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs |
Date: |
Wed, 14 Dec 2016 10:18:17 +0000 |
On 13 December 2016 at 21:16, Andrew Jones <address@hidden> wrote:
> On Tue, Dec 13, 2016 at 10:36:01AM +0000, Peter Maydell wrote:
>> This patchset adds support for the Virtualization extensions to QEMU's
>> GICv3 emulation. This was the last missing piece that was stopping
>> us from turning on the EL2 support in the CPU model, so the patchset
>> also adds support for enabling it all on the virt board via the
>> '-machine virtualization=on' option.
>>
>> The result works well enough to allow booting a KVM outer guest kernel
>> and then running QEMU + an inner guest under KVM inside it. The outer
>> guest KVM also passes the kvm-unit-tests GIC tests.
>>
>
> I've started some testing with this. When I boot an outer (L1) kernel
> with more than one cpu allocated I get
>
> [ 3.441908] CPU: CPUs started in inconsistent modes
> [ 3.442787] ------------[ cut here ]------------
> [ 3.445434] WARNING: CPU: 0 PID: 1 at arch/arm64/kernel/smp.c:418
> smp_cpus_done+0x80/0xa0
> ...
>
> and KVM does not init. Booting with only one cpu I see we do start in EL2
> and KVM does init. I'm booting the L1 kernel through UEFI (AAVMF). Also,
> my L1 guest kernel is 4.9 based, but not pure upstream. I can try a more
> pure 4.9 kernel with a defconfig later.
Yeah, I don't think I ever tried an SMP config in outer QEMU.
This seems like it would be a problem with the boot.c code rather than
the new GIC features, though... I'll have a look.
thanks
-- PMM
- [Qemu-arm] [PATCH 18/23] hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR, (continued)
- [Qemu-arm] [PATCH 18/23] hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR, Peter Maydell, 2016/12/13
- [Qemu-arm] [PATCH 12/23] target-arm: Add ARMCPU fields for GIC CPU i/f config, Peter Maydell, 2016/12/13
- [Qemu-arm] [PATCH 22/23] target-arm: Enable EL2 feature bit on A53 and A57, Peter Maydell, 2016/12/13
- [Qemu-arm] [PATCH 20/23] hw/intc/arm_gicv3: Implement EL2 traps for CPU i/f regs, Peter Maydell, 2016/12/13
- Re: [Qemu-arm] [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs, Andrew Jones, 2016/12/13
- Re: [Qemu-arm] [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs,
Peter Maydell <=
- Re: [Qemu-arm] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs, Andrew Jones, 2016/12/16
- Re: [Qemu-arm] [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs, Alistair Francis, 2016/12/19