On 1/23/2011 3:20 AM, Eli Zaretskii wrote:
Date: Sat, 22 Jan 2011 12:28:04 -0600
From: Raleigh Rinehart<address@hidden>
CC: "address@hidden"<address@hidden>
I will check out the Environment variables and see if anything turns up
there. However, after some more tests it seems that the problem is
related to command line parameter length limits. We are using just the
plain windows cmd.exe for our shell (on XP and 2003). If I divide the
$(libraries) list into smaller chunks then it is okay. Although it is
somewhat strange that I get this error since the length of the cmd is
5329, well short of the supposed 8191 limit for cmd.exe on xp. I
suppose it could just be a bug in 3.81.
Actually, the way Make invokes command lines that don't need
redirection, pipes, and other shell features, the maximum length of a
command line is 32K, because Make doesn't go through cmf.exe in that
case.
Are you sure this is a command line length problem? Did you verify
that the same Makefile works with shorter commands? If so, what is
the maximum command line length that still works?
Yep, I'm sure the problem is cmd line length. I did verified with
the same makefile that if shorter lengths are used things work. It
seems the limit for me is around ~4680. I test this by breaking up the
copy command into 3 pieces using a canned recipe like this:
define copy-files
@echo copy part 1
$(CP) $(wordlist 1,105,$(1)) $2
@echo part 2
$(CP) $(wordlist 105,210,$(1)) $2
@echo part 3
$(CP) $(wordlist 210,$(words $(1)),$(1)) $2
endef
Now the problem is how to write a macro to split a list into multiple
smaller lists to exec the cmd on. I already know I'm going to have the
same issue in other parts on the makefile (linking for example). Any
ideas on this?
Why do you need a macro? Cannot you define the partial lists
manually?
If the list is produced automatically by Make, please show how it is
produced. The recipe for breaking it depends on how it is produced.
The lists of obj files and libraries are built up automatically by
Make. Our build system looks something like this:
top_level_dir
+
|
+----build (main makefile is located here)
|
+---module
| +---build (module specific make files are here)
| +---src
+---module
| +---build
| +---src
...
The main Makefile builds a list of modules based on variable set on the
command line. Make then goes through and includes the module.mk
Makefile for those modules. It is in these module makefiles that the
list of libraries and object files is built using variable assignments
such as this:
local_module := $(notdir $(local_dir))
local_objs := $(subst .c,.o,$(subst .s,.o,$(local_src)))
local_lib := $(local_dir)/lib/lib$(local_module).a
libraries += $(local_lib)
Ideally I'd like to use macros so that it is as minimally invasive as
possible, ideally basically a drop in replacement for the CP, LD, AR,
etc. commands. The one I used above for copying files would work, but I
was hoping to write something a little more intelligent, dividing the
list into an appropriate number of sub-lists.
thanks for your help,
-raleigh