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sourcing from a Makefile


From: Maya
Subject: sourcing from a Makefile
Date: Wed, 07 Jul 2004 13:03:54 -0400

In the directory './dev/' I have a a makefile called "Makefile.bas" that looks 
like this:
-- snip --
#./dev/Make.bas

# Variables
BASE_OBJS = def.o 

# The address of the source and header files are relative to the directory 
where Makefile.bas is at.
# Is this correct?
DEF_HPP    = ./jme/def/def.hpp
DEF_CPP    = ./jme/def/def.cpp


def.o: $(DEF_HPP)
    $(CPP) $(CFLAGS) $(DEF_CPP)
-- eof --
Now, what I'd like to do is to call Makefile.bas from a 'Makefile.jme'. To 
accomplish this I have the fillowing 
in a 'Makefile.jme'

--snip--
# Makefile.jme
CPP=g++

# Libraries to be included
include /dev/foo/make/'Makefile.bas

CFLAGS= -Wall -g -c #-ansi
OBJS = main.o email.o $(BASE_OBJS)
EXEC = email.exe

#Application name
my_app: $(OBJS)
    $(CPP) $(LDLIBS) $(OBJS) -o $(EXEC)

main.o: main.cpp
    $(CPP) $(CFLAGS) main.cpp

email.o: email.hpp $(DEF_HPP)
    $(CPP) $(CFLAGS) email.cpp
-- eof --

After typing 'make' I get the follwing error:
make ***No rule to make target 'def/def.hpp' needed by 'email.o'. Stop.


What have I done wrong and how can I fix it?

Thanks in advance!!

-- 
You experience miracles everyday, the first one today happened when you first 
opened your eyes!
     --- Jorge Escalante


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