Re: [lwip-users] lwip on Xilinx devices - MII management interface

[Tyrel Newton]

> Now I'm using lwip on Xilinx FPGA.
>
> This article is about the PHY address when using lwip on Xilinx FPGA.
You should post this question in the Xilinx support forums as this has
nothing to do with lwIP.
>
> When set up network interface on lwip,lwip tries to read PHY address
> using MII management interface(two signal lines : MDC and MDIO),and
> detect PHY
> address,then starts to drive PHY IC.
>
> I have one questions.
>
> Q1.On Xilinx FPGA,is there any method to drive ethernet PHY IC without
> MII management interface ?
>
> And,I made a "dummy" MII management interface logic to drive ethernet
> PHY IC by lwip. (That only loads dummy registor data...)
> I could use lwip on Xilinx FPGA on which the circuit
> that doesn't have MII management interface between FPGA and
> ethernet PHY IC.
> If someone would like to read the "dummy" MII management interface
> logic ?
> If so,I'll up that code (written in VHDL).

If you have access to change the hardware (i.e. VHDL/Verilog) design
within XPS and/or ISE, you need to make sure that you have selected the
MDIO option in XPS under your Ethernet MAC peripheral. I know the
xps_ethernetlite peripheral provides an MDIO option (though only after
versions 3). I'm sure the gigabit MACs also provide an MDIO option.
There should be no need to manually write the MDIO communication logic
to communicate with your PHY.

I ran into a similar problem as you describe where I had to limit what
types of Ethernet the PHY would accept during auto-negotiation.

Tyrel