[lwip-users] lwip on Xilinx devices - MII management interface

[Hiroyasu Matsubara]

Hello,

Now I'm using lwip on Xilinx FPGA.

This article is about the PHY address when using lwip on Xilinx FPGA.

When set up network interface on lwip,lwip tries to read PHY address
using MII management interface(two signal lines : MDC and MDIO),and detect 
PHY
address,then starts to drive PHY IC.

I have one questions.

Q1.On Xilinx FPGA,is there any method to drive ethernet PHY IC without
    MII management interface ?

And,I made a "dummy" MII management interface logic to drive ethernet
PHY IC by lwip. (That only loads dummy registor data...)
I could use lwip on Xilinx FPGA on which the circuit
that doesn't have MII management interface between FPGA and
ethernet PHY IC.
If someone would like to read the "dummy" MII management interface logic ?
If so,I'll up that code (written in VHDL).


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Hiroyasu Matsubara
E-Valley co.ltd.
Dept. of Development and Design