Make execute twice the same dependency

[Emmanuel Mayssat]

Sample code:

echo:
   echo "toto"
target: echo echo                           # echo to be executed twice


is there a way to execute the echo target twice in the same make command?
make target only prints echo one.
An obvious work around is to use 'make echo; make echo' but is there a way to 
do this with one make call?


-- 
Emmanuel
Menlo Security, Inc.
Menlo Park, CA