Re: Recompile files for different parameters

[Matthias Fechner]

On 08.03.11 11:09, Krzysztof Cieniuch wrote:
> Had the same problem and someone pointed me to linux kernel Makefile system
> they have solution for that. In short when you build object file (as
> well as any other target type) you should record
> in dependency file, command line that was used to build that target and
> then force build if command changed.
> Search archives for mail  "Detecting Makefile changes in incremental
> builds"

thanks for that tip it seems to be exactly what I need.
I played around with some combinations but I just started to write 
Makefiles, so it is very hard to really understand how it works.

What I did now is:
1. I added into the .c.o target two new commands to generate a .d file 
with all dependencies and a line to create the new .cmd file with the 
script fixdep from the linux kernel source

2. I added a line to include the .cmd files into the make process.

But what is not clear for me, how can I say make to rebuild if the 
command line changed?
If I understood it correctly I must create a reference to the target 
cmd_$<: but I have not really an idea how to do this.

Attach the current Makefile.

Thanks,
Matthias

--
"Programming today is a race between software engineers striving to 
build bigger and better idiot-proof programs, and the universe trying to 
produce bigger and better idiots. So far, the universe is winning." -- 
Rich Cook

Makefile
Description: Text document