Basic questions about makefile, e.g. what does @- mean

[Marco]

Hi,

I have some questions considering makefiles. My makefile is as follows:

###########################################################
program_NAME := prog
program_C_SRCS := $(wildcard *.c)
program_CXX_SRCS := $(wildcard *.cpp)
program_C_OBJS := ${program_C_SRCS:.c=.o}
program_CXX_OBJS := ${program_CXX_SRCS:.cpp=.o}
program_OBJS := $(program_C_OBJS) $(program_CXX_OBJS)
program_INCLUDE_DIRS :=
program_LIBRARY_DIRS :=
program_LIBRARIES :=
CPPFLAGS += $(foreach includedir,$(program_INCLUDE_DIRS),-I$(includedir))
LDFLAGS += $(foreach librarydir,$(program_LIBRARY_DIRS),-L$(librarydir))
LDFLAGS += $(foreach library,$(program_LIBRARIES),-l$(library))
.PHONY: all clean distclean
all: $(program_NAME)

$(program_NAME): $(program_OBJS)
        $(LINK.cc) $(program_OBJS) -o $(program_NAME)

clean:
        @- $(RM) $(program_NAME)
        @- $(RM) $(program_OBJS)
distclean: clean
###########################################################

I think the linking takes place on the following line:

$(program_NAME): $(program_OBJS)
        $(LINK.cc) $(program_OBJS) -o $(program_NAME)

Correct me if I'm wrong. Where does the compiling take place?
What does the @- mean? @ means silent output as far as I know, but @-?
Where can I specify compiling options, such as -Wall or -pedantic?


Regards
Marco