Re: question make document sec "3.8 Overriding Part of Another Makefile"

[Philip Guenther]

On Sat, Oct 25, 2008 at 7:50 AM, loody <address@hidden> wrote:
> I read the 3.8 section of make document and I type the command below
> on my linux machine:
>
> foo:
>        ls -lt
> %: force
>        @$(MAKE) -f Makefile $@
> force: ;

Section 3.8 of the manual describes putting that in a file named
GNUmakefile in a directory where there's already a Makefile that does
other stuff.  That's not what you did.


> The result is look like:
> address@hidden make]# make foo
> make[1]: Entering directory `/root/make'
> make[2]: Entering directory `/root/make'
> make[3]: Entering directory `/root/make'
> make[4]: Entering directory `/root/make'
> ......

<rant>
  DON'T DO RANDOM STUFF AS ROOT.  USE ROOT WHEN YOU
  NEED IT BUT OTHERWISE RUN STUFF AS A NORMAL USER.
</rant>


> The make call itself recursively.
> Below are my assumptions about this problem.
> 1. the prereq of foo is empty, so it go to target: %: force

Nope.  This harder than it seems because of the '@' on the recursive
make line.  If you remove that, you'll see this:

$ make
make -f Makefile Makefile
make[1]: Entering directory `/tmp/f'
make -f Makefile Makefile
...

Aha!  Before trying to build 'foo', make wants to make sure it's own
makefile is up to date.  It matches 'Makefile' against the
match-anything rule, which says that it has 'force' as a prerequisite,
but that file doesn't exist and won't be created, so it runs the rule
to rebuild the Makefile and loops.  The 'foo' rule had nothing to do
with it.


I think this is a bug in the info pages: that example should have a
do-nothing target for GNUmakefile to prevent the loop:

GNUmakefile: ;


...
> Meanwhile, I do some experiment as:
> foo:
>        ls -lt
> %:
>        @$(MAKE) -f Makefile $@
> force: ;
>
> The make will execute "ls -lt".

Here, the match-anything rule has no prerequisites, so if the file
exists then it's up to date.


Philip Guenther