Figured it out

[Bryan Ischo]

I figured out how to have GNU Make do what I was actually trying to get it
to do.  Here is my updated Makefile:

--- begin Makefile ---

FRAGMENTS = foo bar

define TEST_RULE

.PHONY: $(1)
$(1):
        @echo $$@
        @echo $(2)

endef

define PROCESS_FRAGMENT

$(eval -include $(1).mk)

$(call TEST_RULE,$(1),$(VARIABLE))

endef

$(foreach i, $(FRAGMENTS), $(eval $(call PROCESS_FRAGMENT,$(i))))

--- end Makefile ---

Note that rather than doing all of the double-evals, and the
double-dollar-sign escaping, and stuff like that, I just add to add an
$(eval) around the -include directive in the PROCESS_FRAGMENT template. 
This makes GNU Make evaluate the -include while it is expanding the
template, thus acquiring the value for VARIABLE that I want it to have and
subsequently replace into the rule.

This is much simpler than what I was doing, and I think that this
technique will simplify my Makefile substantially.

Also this eliminates the need I thought I had to have variables in
commands immediately evaluated instead of deferred evaluated.

Thank you everyone for listening and for your help!
Bryan

------------------------------------------------------------------------
Bryan Ischo                address@hidden            2001 Mazda 626 GLX
Hamilton, New Zealand      http://www.ischo.com     RedHat Fedora Core 5
------------------------------------------------------------------------