have a problem mixing Make and java.

[richard t]

heres a minimal version of my make file
 
src = ./src
obj = ./obj
ui_c = com/rich/tool/ui/MainPanel.class
db_c= com/rich/tool/db/Connect.class \
          com/rich/tool/db/User.class
tl_c =  com/rich/tool/Tool.class
 
classes = $(ui_c) $(db_c) $(tl_c)
 
target: $(classes)
       echo "done"
 
$(classes) : $(subst .class,.java,$(subst
$(obj),$(src),$(classes)))
       javac $(JFLAGS) $(subst $(src)/,,$<)
 
ok the problem that I get is that the macro ($<) does
not seem to iterate for the
different source files and I would like to know why
that happens, and also a problem is that when a source
file gets changed Make doesnt seem to know that it
needs to recompile the source for it and I would like
to know why that is...
 
in the gnu make user's manual you should be able to do
something like:
 
$(dir)/%.o : $(dir)/%.c
    $(cc) $(cflags) $<
 
so I would think that my makefile should work. as a
sideline note, I did make a work around for this by
using the target macro $@ which does seem to iterate
through the target list. Unfortunately I still have
the problem where a modified source doesn't trigger
make to recompile it.
 
- richt
 

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