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[Commit-gnuradio] r9039 - gnuradio/branches/developers/gnychis/fpga/usrp
From: |
gnychis |
Subject: |
[Commit-gnuradio] r9039 - gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches |
Date: |
Tue, 29 Jul 2008 09:52:12 -0600 (MDT) |
Author: gnychis
Date: 2008-07-29 09:52:12 -0600 (Tue, 29 Jul 2008)
New Revision: 9039
Modified:
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
Log:
creating signal
Modified:
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
===================================================================
---
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
2008-07-29 15:38:37 UTC (rev 9038)
+++
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
2008-07-29 15:52:12 UTC (rev 9039)
@@ -26,6 +26,7 @@
reg [31:0] serial_data;
reg serial_strobe;
wire [15:0] debugbus;
+ reg [15:0] signal;
rx_buffer_inband rx_buffer
(.timestamp_clock(timestamp_clock), .usbclk(usbclk), .bus_reset(bus_reset),
@@ -55,13 +56,21 @@
ch_0 = 0;
ch_1 = 0;
usbclk = 1;
+ channels = 1;
#40 reset = 1'b0;
begin
@(posedge rxclk)
timestamp_clock <= timestamp_clock + 32'd1;
+ signal <= signal + 16'd1;
end
+ begin
+ @(posedge rxstrobe)
+ ch_0 <= signal;
+ ch_1 <= signal;
+ end
+
end
endmodule
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