[Commit-gnuradio] r8350 - usrp2/trunk/firmware/lib

[matt]

Author: matt
Date: 2008-05-09 16:42:53 -0600 (Fri, 09 May 2008)
New Revision: 8350

Modified:
   usrp2/trunk/firmware/lib/db_rfx.c
Log:
set atr, turn on clocks


Modified: usrp2/trunk/firmware/lib/db_rfx.c
===================================================================
--- usrp2/trunk/firmware/lib/db_rfx.c   2008-05-09 22:29:43 UTC (rev 8349)
+++ usrp2/trunk/firmware/lib/db_rfx.c   2008-05-09 22:42:53 UTC (rev 8350)
@@ -19,8 +19,9 @@
 #include <spi.h>
 #include <memory_map.h>
 #include <db_base.h>
+#include <hal_io.h>
+#include <ad9510.h>
 
-
 bool rfx_init_rx(struct db_base *db);
 bool rfx_init_tx(struct db_base *db);
 bool rfx_set_freq(struct db_base *db, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
@@ -54,6 +55,11 @@
 
 const u2_fxpt_freq_t phdet_freq =  U2_DOUBLE_TO_FXPT_FREQ(100e6/R_DIV);
 
+// IO Pin functions
+#define POWER_UP  (1 << 7)  //  Low enables power supply
+#define ANT_SW  (1 << 6)   // On TX DB, 0 = TX, 1 = RX, on RX DB 0 = main ant, 
1 = RX2
+#define MIX_EN  (1 << 5)   // Enable appropriate mixer
+#define LOCKDET_MASK (1 << 2)   // Input pin
 struct db_rfx_common {
   // RFX common stuff here (if any)
   unsigned char DIV2;
@@ -92,6 +98,7 @@
  */
 struct db_rfx_400_rx db_rfx_400_rx = {
   .base.dbid = 0x0004,
+  .base.is_tx = false,
   .base.output_enables = 0x00E0,
   .base.used_pins = 0x00FF,
   //.base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(xxx),
@@ -109,8 +116,8 @@
   .base.set_gain = rfx_set_gain,
   .base.set_tx_enable = 0,
   // .base.atr_mask = 
-  // .base.atr_txval = 
-  // .base.atr_rxval =
+  .base.atr_txval = 0,
+  .base.atr_rxval = MIX_EN,
   // .base.atr_tx_delay =
   // .base.atr_rx_delay =
   .common.DIV2 = 0,
@@ -123,6 +130,7 @@
 
 struct db_rfx_400_tx db_rfx_400_tx = {
   .base.dbid = 0x0008,
+  .base.is_tx = true,
   .base.output_enables = 0x00E0,
   .base.used_pins = 0x00FF,
   //.base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(xxx),
@@ -140,8 +148,8 @@
   .base.set_gain = rfx_set_gain,
   .base.set_tx_enable = rfx_set_tx_enable,
   // .base.atr_mask = 
-  // .base.atr_txval = 
-  // .base.atr_rxval =
+  .base.atr_txval = MIX_EN, 
+  .base.atr_rxval = ANT_SW,
   // .base.atr_tx_delay =
   // .base.atr_rx_delay =
   .common.DIV2 = 1,
@@ -155,6 +163,9 @@
 rfx_init_tx(struct db_base *dbb)
 {
   struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
+  ad9510_write_reg(0x42, 0x08);        // enable output 6 (db_tx_clk), CMOS
+  ad9510_write_reg(0x55, 0x80); // Bypass Div #6, 100 MHz clock
+  ad9510_write_reg(0x5A, 0x01); // Update Regs
   return true;
 }
 
@@ -162,6 +173,9 @@
 rfx_init_rx(struct db_base *dbb)
 {
   struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
+  ad9510_write_reg(0x43, 0x08); // enable output 7 (db_rx_clk), CMOS
+  ad9510_write_reg(0x57, 0x80); // Bypass Div #7, 100 MHz clock
+  ad9510_write_reg(0x5A, 0x01); // Update Regs
   return true;
 }
 
@@ -209,12 +223,21 @@
   return false;
 }
 
+bool
+rfx_lock_detect(struct db_base *dbb)
+{
+  struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
+  int pins;
+  pins = hal_gpio_read( db->base.is_tx ? GPIO_TX_BANK : GPIO_RX_BANK );
+  if(pins & LOCKDET_MASK)
+    return true;
+  return false;
+}
+
+
 /* 
 # Tx and Rx have shared defs, but different i/o regs
 AUX_RXAGC = (1 << 8)
-POWER_UP = (1 << 7)         # enables power supply
-RX_TXN = (1 << 6)           # Tx only: T/R antenna switch for TX/RX port
-RX2_RX1N = (1 << 6)         # Rx only: antenna switch between RX2 and TX/RX 
port
 ENABLE = (1 << 5)           # enables mixer
 AUX_SEN = (1 << 4)
 AUX_SCLK = (1 << 3)