[Commit-gnuradio] r7816 - usrp2/trunk/fpga/serdes

[matt]

Author: matt
Date: 2008-02-24 12:06:59 -0700 (Sun, 24 Feb 2008)
New Revision: 7816

Modified:
   usrp2/trunk/fpga/serdes/serdes_rx.v
Log:
small state machine change for error checking on flow control failures, also 
added debug pins


Modified: usrp2/trunk/fpga/serdes/serdes_rx.v
===================================================================
--- usrp2/trunk/fpga/serdes/serdes_rx.v 2008-02-24 19:06:07 UTC (rev 7815)
+++ usrp2/trunk/fpga/serdes/serdes_rx.v 2008-02-24 19:06:59 UTC (rev 7816)
@@ -39,7 +39,8 @@
      input wr_full_i,
 
      output [15:0] fifo_space,
-     output xon_rcvd, output xoff_rcvd
+     output xon_rcvd, output xoff_rcvd,
+     output [31:0] debug
      );
 
    localparam K_COMMA = 8'b101_11100;     // 0xBC K28.5
@@ -204,8 +205,13 @@
         CRC_CHECK :
           if(chosen_data[17:0] == {2'b00,CRC})
             begin
-               state <= DONE;
-               eop_i <= 1;
+               if(full)
+                 state <= ERROR;
+               else
+                 begin
+                    eop_i <= 1;
+                    state <= DONE;
+                 end
             end
           else if(wait_here)
             ;
@@ -255,7 +261,7 @@
    always @(posedge clk)
      if(rst)
        xfer_active <= 0;
-     else if(~empty & (eop_o | wr_full_i))
+     else if(xfer_active & ~empty & (eop_o | wr_full_i | error_o))
        xfer_active <= 0;
      else if(wr_ready_i & sop_o)
        xfer_active <= 1;
@@ -265,8 +271,13 @@
    assign      wr_write_o = xfer_active & ~empty;
    assign      wr_done_o = eop_o & ~empty & xfer_active;
    //assign      wr_error_o = xfer_active & ((wr_full_i & ~eop_o & 
~empty)|error_o);
-   assign      wr_error_o = xfer_active & error_o;
+   assign      wr_error_o = xfer_active & ~empty & error_o;
 
    assign      wr_dat_o = line_o;
+
+   assign debug = { { fifo_space[15:8] },
+                   { fifo_space[7:0] },
+                   { 2'd0, error_i, sop_i, eop_i, error_o, sop_o, eop_o },
+                   { full, empty, write, read, xfer_active, state[2:0] } };
    
 endmodule // serdes_rx