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[Commit-gnuradio] r6571 - in gnuradio/branches/developers/matt/u2f/eth/r
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From: |
matt |
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Subject: |
[Commit-gnuradio] r6571 - in gnuradio/branches/developers/matt/u2f/eth/rtl/verilog: . MAC_rx MAC_tx |
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Date: |
Tue, 2 Oct 2007 01:55:42 -0600 (MDT) |
Author: matt
Date: 2007-10-02 01:55:40 -0600 (Tue, 02 Oct 2007)
New Revision: 6571
Modified:
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_rx.v
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_rx/MAC_rx_FF.v
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_top.v
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx.v
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx/MAC_tx_FF.v
Log:
parameterized fifo depth instead of `define
Modified:
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_rx/MAC_rx_FF.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_rx/MAC_rx_FF.v
2007-10-02 07:36:33 UTC (rev 6570)
+++ gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_rx/MAC_rx_FF.v
2007-10-02 07:55:40 UTC (rev 6571)
@@ -117,40 +117,41 @@
output Rx_mac_err;
output Rx_mac_eop;
+ parameter RX_FF_DEPTH = 9;
//-------------------------------------------------------------------------
// Internal signals
//-------------------------------------------------------------------------
- parameter State_byte3 = 4'h0;
- parameter State_byte2 = 4'h1;
- parameter State_byte1 = 4'h2;
- parameter State_byte0 = 4'h3;
- parameter State_be0 = 4'h4;
- parameter State_be3 = 4'h5;
- parameter State_be2 = 4'h6;
- parameter State_be1 = 4'h7;
- parameter State_err = 4'h8;
- parameter State_err_end = 4'h9;
- parameter State_idle = 4'ha;
+ localparam State_byte3 = 4'h0;
+ localparam State_byte2 = 4'h1;
+ localparam State_byte1 = 4'h2;
+ localparam State_byte0 = 4'h3;
+ localparam State_be0 = 4'h4;
+ localparam State_be3 = 4'h5;
+ localparam State_be2 = 4'h6;
+ localparam State_be1 = 4'h7;
+ localparam State_err = 4'h8;
+ localparam State_err_end = 4'h9;
+ localparam State_idle = 4'ha;
- parameter SYS_read = 3'd0;
- parameter SYS_pause = 3'd1;
- parameter SYS_wait_end = 3'd2;
- parameter SYS_idle = 3'd3;
- parameter FF_emtpy_err = 3'd4;
+ localparam SYS_read = 3'd0;
+ localparam SYS_pause = 3'd1;
+ localparam SYS_wait_end = 3'd2;
+ localparam SYS_idle = 3'd3;
+ localparam FF_emtpy_err = 3'd4;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_wr;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_wr_ungray;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_wr_ungray_next;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_wr_gray;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_wr_gray_dl1;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_wr_reg;
+ reg [RX_FF_DEPTH-1:0] Add_wr;
+ reg [RX_FF_DEPTH-1:0] Add_wr_ungray;
+ reg [RX_FF_DEPTH-1:0] Add_wr_ungray_next;
+ reg [RX_FF_DEPTH-1:0] Add_wr_gray;
+ reg [RX_FF_DEPTH-1:0] Add_wr_gray_dl1;
+ reg [RX_FF_DEPTH-1:0] Add_wr_reg;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_rd;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_rd_gray;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_rd_gray_dl1;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_rd_ungray;
- reg [`MAC_RX_FF_DEPTH-1:0] Add_rd_ungray_next;
+ reg [RX_FF_DEPTH-1:0] Add_rd;
+ reg [RX_FF_DEPTH-1:0] Add_rd_gray;
+ reg [RX_FF_DEPTH-1:0] Add_rd_gray_dl1;
+ reg [RX_FF_DEPTH-1:0] Add_rd_ungray;
+ reg [RX_FF_DEPTH-1:0] Add_rd_ungray_next;
reg [35:0] Din;
reg [35:0] Din_tmp;
@@ -159,10 +160,10 @@
reg Wr_en;
reg Wr_en_tmp;
reg Wr_en_ptr;
- wire [`MAC_RX_FF_DEPTH-1:0] Add_wr_pluse;
- wire [`MAC_RX_FF_DEPTH-1:0] Add_wr_pluse4;
- wire [`MAC_RX_FF_DEPTH-1:0] Add_wr_pluse3;
- wire [`MAC_RX_FF_DEPTH-1:0] Add_wr_pluse2;
+ wire [RX_FF_DEPTH-1:0] Add_wr_pluse;
+ wire [RX_FF_DEPTH-1:0] Add_wr_pluse4;
+ wire [RX_FF_DEPTH-1:0] Add_wr_pluse3;
+ wire [RX_FF_DEPTH-1:0] Add_wr_pluse2;
reg Full;
reg Almost_full;
@@ -313,8 +314,8 @@
else
begin : Add_wr_gray_loop
integer i;
- Add_wr_gray[`MAC_RX_FF_DEPTH-1] <= Add_wr[`MAC_RX_FF_DEPTH-1];
- for ( i=`MAC_RX_FF_DEPTH-2; i>=0; i=i-1 )
+ Add_wr_gray[RX_FF_DEPTH-1] <= Add_wr[RX_FF_DEPTH-1];
+ for ( i=RX_FF_DEPTH-2; i>=0; i=i-1 )
Add_wr_gray[i] <= Add_wr[i+1] ^ Add_wr[i];
end
@@ -329,8 +330,8 @@
always @( * )
begin : Add_rd_ungray_loop
integer i;
- Add_rd_ungray_next[`MAC_RX_FF_DEPTH-1] =
Add_rd_gray_dl1[`MAC_RX_FF_DEPTH-1];
- for ( i=`MAC_RX_FF_DEPTH-2; i>=0; i=i-1 )
+ Add_rd_ungray_next[RX_FF_DEPTH-1] = Add_rd_gray_dl1[RX_FF_DEPTH-1];
+ for ( i=RX_FF_DEPTH-2; i>=0; i=i-1 )
Add_rd_ungray_next[i] = Add_rd_ungray_next[i+1] ^ Add_rd_gray_dl1[i];
end
@@ -601,8 +602,8 @@
Fifo_data_count <= 0;
else
Fifo_data_count <=
- Add_wr_ungray[`MAC_RX_FF_DEPTH-1:`MAC_RX_FF_DEPTH-5] -
- Add_rd[`MAC_RX_FF_DEPTH-1:`MAC_RX_FF_DEPTH-5];
+ Add_wr_ungray[RX_FF_DEPTH-1:RX_FF_DEPTH-5] -
+ Add_rd[RX_FF_DEPTH-1:RX_FF_DEPTH-5];
always @( posedge Clk_SYS or posedge Reset )
if ( Reset )
@@ -638,8 +639,8 @@
else
begin : Add_rd_gray_loop
integer i;
- Add_rd_gray[`MAC_RX_FF_DEPTH-1] <= Add_rd[`MAC_RX_FF_DEPTH-1];
- for ( i=`MAC_RX_FF_DEPTH-2; i>=0; i=i-1 )
+ Add_rd_gray[RX_FF_DEPTH-1] <= Add_rd[RX_FF_DEPTH-1];
+ for ( i=RX_FF_DEPTH-2; i>=0; i=i-1 )
Add_rd_gray[i] <= Add_rd[i+1] ^ Add_rd[i];
end
@@ -660,8 +661,8 @@
always @( * )
begin : Add_wr_ungray_loop
integer i;
- Add_wr_ungray_next[`MAC_RX_FF_DEPTH-1] =
Add_wr_gray_dl1[`MAC_RX_FF_DEPTH-1];
- for ( i=`MAC_RX_FF_DEPTH-2; i>=0; i=i-1 )
+ Add_wr_ungray_next[RX_FF_DEPTH-1] = Add_wr_gray_dl1[RX_FF_DEPTH-1];
+ for ( i=RX_FF_DEPTH-2; i>=0; i=i-1 )
Add_wr_ungray_next[i] = Add_wr_ungray_next[i+1] ^ Add_wr_gray_dl1[i];
end
@@ -730,7 +731,7 @@
//-------------------------------------------------------------------------
// Instantiation of dual-ported RAM
- duram #(36, `MAC_RX_FF_DEPTH, "M4K") U_duram(
+ duram #(36, RX_FF_DEPTH, "M4K") U_duram(
.data_a ( Din ),
.data_b ( 36'b0 ),
.wren_a ( Wr_en ),
Modified: gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_rx.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_rx.v
2007-10-02 07:36:33 UTC (rev 6570)
+++ gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_rx.v
2007-10-02 07:55:40 UTC (rev 6571)
@@ -55,7 +55,9 @@
`include "header.vh"
-module MAC_rx (
+module MAC_rx
+#(parameter RX_FF_DEPTH = 9)
+ (
input Reset ,
input Clk_user,
input Clk ,
@@ -168,7 +170,7 @@
.RX_MIN_LENGTH (RX_MIN_LENGTH )
);
-MAC_rx_FF U_MAC_rx_FF (
+MAC_rx_FF #(.RX_FF_DEPTH(RX_FF_DEPTH)) U_MAC_rx_FF (
.Reset (Reset ),
.Clk_MAC (Clk ),
.Clk_SYS (Clk_user ),
Modified: gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_top.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_top.v
2007-10-02 07:36:33 UTC (rev 6570)
+++ gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_top.v
2007-10-02 07:55:40 UTC (rev 6571)
@@ -50,7 +50,10 @@
// no message
//
-module MAC_top(
+module MAC_top
+ #(parameter TX_FF_DEPTH = 9,
+ parameter RX_FF_DEPTH = 9)
+ (
// System signals
input Clk_125M,
input Clk_user,
Modified:
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx/MAC_tx_FF.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx/MAC_tx_FF.v
2007-10-02 07:36:33 UTC (rev 6570)
+++ gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx/MAC_tx_FF.v
2007-10-02 07:55:40 UTC (rev 6571)
@@ -112,53 +112,56 @@
input FullDuplex ;
input [4:0] Tx_Hwmark ;
input [4:0] Tx_Lwmark ;
+
+ parameter TX_FF_DEPTH = 9;
+
//******************************************************************************
//internal signals
//******************************************************************************
-parameter MAC_byte3 =4'd00;
-parameter MAC_byte2 =4'd01;
-parameter MAC_byte1 =4'd02;
-parameter MAC_byte0 =4'd03;
-parameter MAC_wait_finish =4'd04;
-parameter MAC_retry =4'd08;
-parameter MAC_idle =4'd09;
-parameter MAC_FFEmpty =4'd10;
-parameter MAC_FFEmpty_drop =4'd11;
-parameter MAC_pkt_sub =4'd12;
-parameter MAC_FF_Err =4'd13;
+localparam MAC_byte3 =4'd00;
+localparam MAC_byte2 =4'd01;
+localparam MAC_byte1 =4'd02;
+localparam MAC_byte0 =4'd03;
+localparam MAC_wait_finish =4'd04;
+localparam MAC_retry =4'd08;
+localparam MAC_idle =4'd09;
+localparam MAC_FFEmpty =4'd10;
+localparam MAC_FFEmpty_drop =4'd11;
+localparam MAC_pkt_sub =4'd12;
+localparam MAC_FF_Err =4'd13;
reg [3:0] Next_state_MAC ;
-parameter SYS_idle =4'd0;
-parameter SYS_WaitSop =4'd1;
-parameter SYS_SOP =4'd2;
-parameter SYS_MOP =4'd3;
-parameter SYS_DROP =4'd4;
-parameter SYS_EOP_ok =4'd5;
-parameter SYS_FFEmpty =4'd6;
-parameter SYS_EOP_err =4'd7;
-parameter SYS_SOP_err =4'd8;
+localparam SYS_idle =4'd0;
+localparam SYS_WaitSop =4'd1;
+localparam SYS_SOP =4'd2;
+localparam SYS_MOP =4'd3;
+localparam SYS_DROP =4'd4;
+localparam SYS_EOP_ok =4'd5;
+localparam SYS_FFEmpty =4'd6;
+localparam SYS_EOP_err =4'd7;
+localparam SYS_SOP_err =4'd8;
reg [3:0] Next_state_SYS;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_wr ;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_wr_ungray ;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_wr_gray ;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_wr_gray_dl1 ;
+reg [TX_FF_DEPTH-1:0] Add_wr ;
+reg [TX_FF_DEPTH-1:0] Add_wr_ungray ;
+reg [TX_FF_DEPTH-1:0] Add_wr_gray ;
+reg [TX_FF_DEPTH-1:0] Add_wr_gray_dl1 ;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_rd ;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_rd_reg ;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_rd_gray ;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_rd_gray_dl1 ;
-reg [`MAC_TX_FF_DEPTH-1:0] Add_rd_ungray ;
+reg [TX_FF_DEPTH-1:0] Add_rd ;
+reg [TX_FF_DEPTH-1:0] Add_rd_reg ;
+reg [TX_FF_DEPTH-1:0] Add_rd_gray ;
+reg [TX_FF_DEPTH-1:0] Add_rd_gray_dl1 ;
+reg [TX_FF_DEPTH-1:0] Add_rd_ungray ;
wire[35:0] Din ;
wire[35:0] Dout ;
reg Wr_en ;
-wire[`MAC_TX_FF_DEPTH-1:0] Add_wr_pluse;
-wire[`MAC_TX_FF_DEPTH-1:0] Add_wr_pluse_pluse;
-reg [`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5] Add_rd_reg_dl1;
+wire[TX_FF_DEPTH-1:0] Add_wr_pluse;
+wire[TX_FF_DEPTH-1:0] Add_wr_pluse_pluse;
+reg [TX_FF_DEPTH-1:TX_FF_DEPTH-5] Add_rd_reg_dl1;
`ifdef MAC_TARGET_ALTERA
@@ -325,8 +328,8 @@
else
begin : Add_wr_gray_loop
integer i;
- Add_wr_gray[`MAC_TX_FF_DEPTH-1] <=Add_wr[`MAC_TX_FF_DEPTH-1];
- for (i=`MAC_TX_FF_DEPTH-2;i>=0;i=i-1)
+ Add_wr_gray[TX_FF_DEPTH-1] <=Add_wr[TX_FF_DEPTH-1];
+ for (i=TX_FF_DEPTH-2;i>=0;i=i-1)
Add_wr_gray[i] <=Add_wr[i+1]^Add_wr[i];
end
@@ -350,8 +353,8 @@
else if (!Add_rd_jump_wr_pl1)
begin : Add_rd_ungray_loop
integer i;
- Add_rd_ungray[`MAC_TX_FF_DEPTH-1] = Add_rd_gray_dl1[`MAC_TX_FF_DEPTH-1];
- for (i=`MAC_TX_FF_DEPTH-2;i>=0;i=i-1)
+ Add_rd_ungray[TX_FF_DEPTH-1] = Add_rd_gray_dl1[TX_FF_DEPTH-1];
+ for (i=TX_FF_DEPTH-2;i>=0;i=i-1)
Add_rd_ungray[i] = Add_rd_ungray[i+1]^Add_rd_gray_dl1[i];
end
@@ -440,7 +443,7 @@
if (Reset)
Add_rd_reg_dl1 <=0;
else if (Add_rd_reg_rdy_dl1&!Add_rd_reg_rdy_dl2)
- Add_rd_reg_dl1
<=Add_rd_reg[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5];
+ Add_rd_reg_dl1 <=Add_rd_reg[TX_FF_DEPTH-1:TX_FF_DEPTH-5];
@@ -448,9 +451,9 @@
if (Reset)
Fifo_data_count <=0;
else if (FullDuplex)
- Fifo_data_count
<=Add_wr[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5]-Add_rd_ungray[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5];
+ Fifo_data_count
<=Add_wr[TX_FF_DEPTH-1:TX_FF_DEPTH-5]-Add_rd_ungray[TX_FF_DEPTH-1:TX_FF_DEPTH-5];
else
- Fifo_data_count
<=Add_wr[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5]-Add_rd_reg_dl1[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5];
//for half duplex backoff requirement
+ Fifo_data_count
<=Add_wr[TX_FF_DEPTH-1:TX_FF_DEPTH-5]-Add_rd_reg_dl1[TX_FF_DEPTH-1:TX_FF_DEPTH-5];
//for half duplex backoff requirement
always @ (posedge Clk_SYS or posedge Reset)
@@ -615,8 +618,8 @@
else
begin : Add_rd_gray_loop
integer i;
- Add_rd_gray[`MAC_TX_FF_DEPTH-1] <=Add_rd[`MAC_TX_FF_DEPTH-1];
- for (i=`MAC_TX_FF_DEPTH-2;i>=0;i=i-1)
+ Add_rd_gray[TX_FF_DEPTH-1] <=Add_rd[TX_FF_DEPTH-1];
+ for (i=TX_FF_DEPTH-2;i>=0;i=i-1)
Add_rd_gray[i] <= Add_rd[i+1]^Add_rd[i];
end
//
@@ -633,8 +636,8 @@
else
begin : Add_wr_ungray_loop
integer i;
- Add_wr_ungray[`MAC_TX_FF_DEPTH-1] = Add_wr_gray_dl1[`MAC_TX_FF_DEPTH-1];
- for (i=`MAC_TX_FF_DEPTH-2;i>=0;i=i-1)
+ Add_wr_ungray[TX_FF_DEPTH-1] = Add_wr_gray_dl1[TX_FF_DEPTH-1];
+ for (i=TX_FF_DEPTH-2;i>=0;i=i-1)
Add_wr_ungray[i] = Add_wr_ungray[i+1]^Add_wr_gray_dl1[i];
end
@@ -796,7 +799,7 @@
//******************************************************************************
//******************************************************************************
-duram #(36,`MAC_TX_FF_DEPTH,"M4K") U_duram(
+duram #(36,TX_FF_DEPTH,"M4K") U_duram(
.data_a ( Din ),
.data_b ( 36'b0 ),
.wren_a ( Wr_en ),
Modified: gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx.v
2007-10-02 07:36:33 UTC (rev 6570)
+++ gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx.v
2007-10-02 07:55:40 UTC (rev 6571)
@@ -55,7 +55,9 @@
`include "header.vh"
-module MAC_tx(
+module MAC_tx
+#(parameter TX_FF_DEPTH = 9)
+ (
input Reset ,
input Clk ,
input Clk_user ,
@@ -231,7 +233,7 @@
`else
assign MAC_tx_addr_data=0;
`endif
-MAC_tx_FF U_MAC_tx_FF(
+MAC_tx_FF #(.TX_FF_DEPTH(TX_FF_DEPTH)) U_MAC_tx_FF(
.Reset (Reset ),
.Clk_MAC (Clk ),
.Clk_SYS (Clk_user ),
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- [Commit-gnuradio] r6571 - in gnuradio/branches/developers/matt/u2f/eth/rtl/verilog: . MAC_rx MAC_tx,
matt <=