[Commit-gnuradio] r6517 - gnuradio/branches/developers/matt/u2f/eth/rtl/verilog

[matt]

Author: matt
Date: 2007-09-24 02:06:58 -0600 (Mon, 24 Sep 2007)
New Revision: 6517

Modified:
   gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/elastic_buffer.v
   gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/elastic_buffer_tb.v
Log:
seems to be working


Modified: gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/elastic_buffer.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/elastic_buffer.v      
2007-09-24 07:40:42 UTC (rev 6516)
+++ gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/elastic_buffer.v      
2007-09-24 08:06:58 UTC (rev 6517)
@@ -12,7 +12,7 @@
     input      col,
     
     output [7:0] rxd_ret,
-    output reg  rx_dv_ret,
+    output      rx_dv_ret,
     output      rx_er_ret,
     output      crs_ret,
     output      col_ret );
@@ -52,29 +52,38 @@
      end
 
    wire [3:0] addr_delta = addr_rd-addr_wr_ungray;
+   reg         [1:0] direction;
+   localparam retard = 2'd0;
+   localparam good = 2'd1;
+   localparam advance = 2'd2;
+   localparam wayoff = 2'd3;
    
+   always @*
+     case(addr_delta)
+       4'd1, 4'd2, 4'd3, 4'd4, 4'd5 : direction <= retard;
+       4'd15, 4'd14, 4'd13, 4'd12, 4'd11 : direction <= advance;
+       4'd0 : direction <= good;
+       default : direction <= wayoff;
+     endcase // case(addr_delta)
+       
    always @(posedge tx_clk)
      if(rst)
        addr_rd <= 0;
-     else if(buffer[addr_rd][8])
+     else if(rx_dv_ret_adv | rx_dv_ontime)
        addr_rd <= addr_rd + 1;
      else
-       case(addr_delta)
-        4'd1, 4'd2, 4'd3, 4'd4, 4'd5 : addr_rd <= addr_rd;
-        4'd15, 4'd14, 4'd13, 4'd12, 4'd11 : addr_rd <= addr_rd + 2;
-        default : addr_rd <= addr_rd + 1;
-       endcase // case(addr_delta)
-/*   
-  else if(addr_rd == (addr_wr_ungray + 4'd1))
-       ;
-     else if(addr_rd == (addr_wr_ungray - 4'd1))
-       addr_rd <= addr_rd + 2;
-     else
-       addr_rd <= addr_wr_ungray + 1;
-*/
+       case(direction)
+        retard : addr_rd <= addr_rd;
+        advance : addr_rd <= addr_rd + 2;
+        good : addr_rd <= addr_rd + 1;
+        wayoff : addr_rd <= addr_wr_ungray;
+       endcase // case(direction)
+   
    wire         rx_dv_ret_adv;
+   reg                  rx_dv_ontime;
    assign       {col_ret,crs_ret,rx_er_ret,rx_dv_ret_adv,rxd_ret} = 
buffer[addr_rd];
    always @(posedge tx_clk)
-     rx_dv_ret <= rx_dv_ret_adv;
-   
+     rx_dv_ontime <= rx_dv_ret_adv;
+
+   assign       rx_dv_ret = rx_dv_ontime;
 endmodule // elastic_buffer

Modified: 
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/elastic_buffer_tb.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/elastic_buffer_tb.v   
2007-09-24 07:40:42 UTC (rev 6516)
+++ gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/elastic_buffer_tb.v   
2007-09-24 08:06:58 UTC (rev 6517)
@@ -30,6 +30,8 @@
               @(posedge rx_clk);
             SendPKT;
          end
+       repeat (100)
+         @(posedge rx_clk);
        $finish;
      end // initial begin
 
@@ -39,6 +41,8 @@
    
    wire [7:0] diff = rxd_ret_d1 - rxd_ret;
 
+   wire       error = rx_dv_ret && (diff != 8'hFF);
+   
    task SendPKT;
       begin
         {col,crs,rx_er,rx_dv,rxd} <= 0;